| A compact low-power eDRAM-based NoC buffer C Li, P Ampadu 2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015 | 18 | 2015 |
| Concurrent error detection for reliable SHA-3 design P Luo, C Li, Y Fei Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 39-44, 2016 | 16 | 2016 |
| Neuronlink: An efficient chip-to-chip interconnect for large-scale neural network accelerators S Xiao, Y Guo, W Liao, H Deng, Y Luo, H Zheng, J Wang, C Li, G Li, Z Yu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (9 …, 2020 | 15 | 2020 |
| An energy-efficient NoC router with adaptive fault-tolerance using channel slicing and on-demand TMR C Li, M Yang, P Ampadu IEEE Transactions on Emerging Topics in Computing 6 (4), 538-550, 2016 | 8 | 2016 |
| Energy-efficient NoC with variable channel width C Li, P Ampadu 2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015 | 8 | 2015 |
| Reliable ultra-low voltage cache with variation-tolerance C Li, M Zhang, P Ampadu 2013 IEEE 56th International Midwest Symposium on Circuits and Systems …, 2013 | 5 | 2013 |
| An efficient and low-overhead chip-to-chip interconnect protocol design for NoC W Liao, H Deng, Y Luo, S Xiao, C Li, Z Yu 2019 IEEE International Conference on Integrated Circuits, Technologies and …, 2019 | 3 | 2019 |
| Ternary logic dynamic CMOS comparators XY Jin, C Li, JB Liu, XF Jiang, XB Zeng Advanced Materials Research 317, 1177-1182, 2011 | 1 | 2011 |
| Energy-efficient NoC router design with adaptive fault-tolerance C Li University of Rochester, 2017 | | 2017 |
