Sani Nassif
Sani Nassif
Radyalis LLC
Geverifieerd e-mailadres voor radyalis.com - Homepage
TitelGeciteerd doorJaar
High-performance CMOS variability in the 65-nm regime and beyond
K Bernstein, DJ Frank, AE Gattiker, W Haensch, BL Ji, SR Nassif, ...
IBM journal of research and development 50 (4.5), 433-449, 2006
6082006
Modeling and analysis of manufacturing variations
SR Nassif
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No …, 2001
5052001
Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events
R Kanj, R Joshi, S Nassif
2006 43rd ACM/IEEE Design Automation Conference, 69-72, 2006
3532006
Full chip leakage estimation considering power supply and temperature variations
H Su, F Liu, A Devgan, E Acar, S Nassif
Proceedings of the 2003 international symposium on Low power electronics and …, 2003
3112003
A multigrid-like technique for power grid analysis
JN Kozhaya, SR Nassif, FN Najm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002
2992002
Delay variability: sources, impacts and trends
S Nassif
2000 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2000
2812000
Design for variability in DSM technologies [deep submicron technologies]
SR Nassif
Proceedings IEEE 2000 First International Symposium on Quality Electronic …, 2000
2792000
Design for manufacturability and statistical design: a constructive approach
M Orshansky, S Nassif, D Boning
Springer Science & Business Media, 2007
2572007
Models of process variations in device and interconnect
D Boning, S Nassif
Design of high performance microprocessor circuits, 6, 2000
2292000
Fast power grid simulation
SR Nassif, JN Kozhaya
Proceedings of the 37th Annual Design Automation Conference, 156-161, 2000
2242000
Handbook of algorithms for physical design automation
CJ Alpert, DP Mehta, SS Sapatnekar
Auerbach Publications, 2008
2162008
Optimal decoupling capacitor sizing and placement for standard-cell layout designs
H Su, SS Sapatnekar, SR Nassif
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
215*2003
Random walks in a supply network
H Qian, SR Nassif, SS Sapatnekar
Proceedings of the 40th annual Design Automation Conference, 93-98, 2003
1892003
Reliable on-chip systems in the nano-era: Lessons learnt and future trends
J Henkel, L Bauer, N Dutt, P Gupta, S Nassif, M Shafique, M Tahoori, ...
2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-10, 2013
1852013
Power grid analysis benchmarks
SR Nassif
2008 Asia and South Pacific Design Automation Conference, 376-381, 2008
1852008
Benefits and costs of power-gating technique
H Jiang, M Marek-Sadowska, SR Nassif
2005 International Conference on Computer Design, 559-566, 2005
1832005
Power grid analysis using random walks
H Qian, SR Nassif, SS Sapatnekar
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
1742005
Impact of interconnect variations on the clock skew of a gigahertz microprocessor
Y Liu, SR Nassif, LT Pileggi, AJ Strojwas
Proceedings of the 37th Annual Design Automation Conference, 168-171, 2000
1742000
Statistical analysis of SRAM cell stability
K Agarwal, S Nassif
Proceedings of the 43rd annual Design Automation Conference, 57-62, 2006
1652006
Modeling and forecasting of manufacturing variations
SR Nassif
2000 5th International Workshop on Statistical Metrology (Cat. No. 00TH8489 …, 2000
1612000
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Artikelen 1–20