Scalable hierarchical network-on-chip architecture for spiking neural network hardware implementations S Carrillo, J Harkin, LJ McDaid, F Morgan, S Pande, S Cawley, ... IEEE Transactions on Parallel and Distributed Systems 24 (12), 2451-2461, 2012 | 142 | 2012 |
Advancing interconnect density for spiking neural network hardware implementations using traffic-aware adaptive network-on-chip routers S Carrillo, J Harkin, L McDaid, S Pande, S Cawley, B McGinley, F Morgan Neural networks 33, 42-57, 2012 | 70 | 2012 |
A control-structure splitting optimization for GPGPU S Carrillo, J Siegel, X Li Proceedings of the 6th ACM Conference on Computing Frontiers, 147-150, 2009 | 61 | 2009 |
Hardware spiking neural network prototyping and application S Cawley, F Morgan, B McGinley, S Pande, L McDaid, S Carrillo, J Harkin Genetic Programming and Evolvable Machines 12, 257-280, 2011 | 53 | 2011 |
Modular neural tile architecture for compact embedded hardware spiking neural network S Pande, F Morgan, S Cawley, T Bruintjes, G Smit, B McGinley, S Carrillo, ... Neural processing letters 38, 131-153, 2013 | 35 | 2013 |
Hierarchical network-on-chip and traffic compression for spiking neural network implementations S Carrillo, J Harkin, LJ McDaid, S Pande, S Cawley, B McGinley, ... 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 83-90, 2012 | 30 | 2012 |
EMBRACE-SysC for analysis of NoC-based spiking neural network architectures S Pande, F Morgan, S Cawley, B McGinley, S Carrillo, J Harkin, L McDaid 2010 International Symposium on System on Chip, 139-145, 2010 | 17 | 2010 |
Design and implementation of an embedded microprocessor compatible with IL language in accordance to the norm IEC 61131-3 SL Carrillo, AZ Polo, MP Esmeral 2005 International Conference on Reconfigurable Computing and FPGAs …, 2005 | 17 | 2005 |
Adaptive routing strategies for large scale spiking neural network hardware implementations S Carrillo, J Harkin, L McDaid, S Pande, S Cawley, F Morgan Artificial Neural Networks and Machine Learning–ICANN 2011: 21st …, 2011 | 13 | 2011 |
An efficient, high-throughput adaptive NoC router for large scale spiking neural network hardware implementations S Carrillo, J Harkin, L McDaid, S Pande, F Morgan Evolvable Systems: From Biology to Hardware: 9th International Conference …, 2010 | 11 | 2010 |
Bio-inspired online fault detection in noc interconnect M McElholm, J Harkin, L McDaid, S Carrillo Energy-efficient fault-tolerant systems, 241-267, 2014 | 8 | 2014 |
Design and implementation of an arithmetic processor unit based on the logarithmic number system S Carrillo, H Carrillo, F Viveros IEEE Latin America Transactions 8 (6), 605-617, 2010 | 6 | 2010 |
Addressing the hardware resource requirements of network-on-chip based neural architectures S Pande, F Morgan, S Cowley, B Mc Ginley, J Harkin, S Carrillo, ... International Conference on Neural Computation Theory and Applications 2 …, 2011 | 4 | 2011 |
Advances in Scalable, Adaptive Interconnect for Reconfigurable Bio-Inspired Computational Platforms S Carrillo, J Harkin, L McDaid, F Morgan DATE 2011: Workshop on Design Methods and Tools for FPGAs-based Acceleration …, 2011 | 3 | 2011 |
Hierarchical networks-on-chip architecture for neuromorphic hardware MA Trefzer, AM Tyrrell, S Carrillo, J Harkin, L McDaid Evolvable Hardware: From Practice to Application, 297-330, 2015 | 2 | 2015 |
Impact analysis of conditional and loop statements for the NVIDIA G80 architecture S Carrillo, J Siegel, X Li Ingeniería y Desarrollo, 130-150, 2010 | 2 | 2010 |
Scalable hierarchical networks-on-chip architecture for brain-inspired computing S Carrillo University of Ulster, 2013 | 1 | 2013 |
Investigating Power Reduction for NoC-Based Spiking Neural Network Platforms using Channel Encoding N McDonnell, S Carrillo, J Harkin, L McDaid International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS …, 2012 | | 2012 |
Análisis del impacto de sentencias condicionales y repetitivas en la arquitectura NVIDIA G80. S Carrillo, J Siegel, X Li Ingeniería y Desarrollo, 130-151, 2010 | | 2010 |
Metodología para diseñar un Contador de Centenas utilizando Alliance CAD A Ponce, S Carrillo Universidad Autónoma del Caribe, 2009 | | 2009 |