| Trimming-less voltage reference for highly uncertain harvesting down to 0.25 V, 5.4 pW L Fassio, L Lin, R De Rose, M Lanuzza, F Crupi, M Alioto IEEE Journal of Solid-State Circuits 56 (10), 3134-3144, 2021 | 24 | 2021 |
| A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter L Fassio, F Settino, L Lin, R De Rose, M Lanuzza, F Crupi, M Alioto IEEE Transactions on Circuits and Systems II: Express Briefs 68 (4), 1393-1397, 2020 | 15 | 2020 |
| A 0.6-to-1.8 V CMOS current reference with near-100% power utilization L Fassio, L Lin, R De Rose, M Lanuzza, F Crupi, M Alioto IEEE Transactions on Circuits and Systems II: Express Briefs 68 (9), 3038-3042, 2021 | 14 | 2021 |
| A 0.25-V, 5.3-pW Voltage Reference with 25-μV/°C Temperature Coefficient, 140-μV/V Line Sensitivity and 2,200-μm2 Area in 180nm L Fassio, L Lin, R De Rose, M Lanuzza, F Crupi, M Alioto 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 6 | 2020 |
| Voltage Reference with Corner-Aware Replica Selection/Merging for 1.4-mV Accuracy in Harvested Systems down to 3.9 pW, 0.2 V L Fassio, L Lin, R De Rose, M Lanuzza, F Crupi, M Alioto IEEE Access, 2023 | 1 | 2023 |
| A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total Accuracy L Fassio, L Lin, R De Rose, M Lanuzza, F Crupi, M Alioto ESSCIRC 2021-IEEE 47th European Solid State Circuits Conference (ESSCIRC …, 2021 | 1 | 2021 |
| Trimming-Less 0.2-V, 3.2-pW Voltage Reference Based on Corner-Aware Replica Combination with 1.6% Process Sensitivity, 1.4-mV Accuracy across PVT and Wafers L Fassio, R De Rose, L Lin, M Lanuzza, F Crupi, MB Alioto IEEE, 2021 | 1 | 2021 |
| A 0.25-V, 5.3-pW Voltage Reference with 25-µV/oC Temperature Coefficient, 140-µV/V Line Sensitivity and 2,200-µm2 Area in 180nm L Fassio, LIN LONGYANG, R De Rose, M Lanuzza, F Crupi, MB ALIOTO | 1 | 2020 |
| SPECIAL ISSUE ON ISICAS2021 L Fassio, L Lin, R De Rose, M Lanuzza, F Crupi, M Alioto, D Shakya, T Wu, ... | | |
