Natalie Enright Jerger
Natalie Enright Jerger
Geverifieerd e-mailadres voor eecg.toronto.edu - Homepage
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Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives
R Marculescu, UY Ogras, LS Peh, N Enright Jerger, Y Hoskote
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2009
7982009
Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing
J Albericio, P Judd, T Hetherington, T Aamodt, N Enright Jerger, ...
International Symposium on Computer Architecture, 2016
4082016
Virtual circuit tree multicasting: A case for on-chip hardware multicast support
N Enright Jerger, LS Peh, M Lipasti
Computer Architecture, 2008. ISCA'08. 35th International Symposium on, 229-240, 2008
281*2008
On-Chip Networks
N Enright Jerger, T Krishna, LS Peh
Synthesis Lectures on Computer Architecture 12 (3), 1-210, 2017
278*2017
On-chip networks
N Enright Jerger, LS Peh
Synthesis Lectures on Computer Architecture 4 (1), 1-141, 2009
237*2009
Achieving predictable performance through better memory controller placement in many-core CMPs
D Abts, ND Enright Jerger, J Kim, D Gibson, MH Lipasti
ACM SIGARCH Computer Architecture News 37 (3), 451-461, 2009
1822009
Scarab: A single cycle adaptive routing and bufferless network
M Hayenga, N Enright Jerger, M Lipasti
Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009
1772009
DBAR: an efficient routing algorithm to support multiple concurrent applications in networks-on-chip
S Ma, N Enright Jerger, Z Wang
Computer Architecture (ISCA), 2011 38th Annual International Symposium on …, 2011
1672011
Circuit-switched coherence
ND Enright Jerger, LS Peh, MH Lipasti
Proceedings of the Second ACM/IEEE International Symposium on Networks-on …, 2008
163*2008
Load Value Approximation
J San Miguel, M Badr, N Enright Jerger
Microarchitecture (MICRO), 2014 47th Annual IEEE/ACM International Symposium …, 2014
1452014
Load Value Approximation: Approaching the Ideal Memory Access Latency
J San Miguel, N Enright Jerger
Workshop on Approximate Computing Across the System Stack, 2014
145*2014
Virtual tree coherence: Leveraging regions and in-network multicast trees for scalable cache coherence
NDE Jerger, LS Peh, MH Lipasti
2008 41st IEEE/ACM International Symposium on Microarchitecture, 35-46, 2008
1062008
Mechanism to exploit synchronization overhead to improve multithreaded performance
N Enright, J Collin, P Wang, H Wang, X Tran, J Shen, G Sheaffer, ...
US Patent 7,587,584, 2009
1012009
Doppelgänger: a cache for approximate computing
J San Miguel, J Albericio, A Moshovos, N Enright Jerger
Proceedings of the 48th International Symposium on Microarchitecture, 50-61, 2015
932015
SynFull: synthetic traffic models capturing cache coherent behaviour
M Badr, N Enright Jerger
Computer Architecture (ISCA), 2014 ACM/IEEE 41st International Symposium on …, 2014
902014
Whole Packet Forwarding: Efficient Design of Fully Adaptive Routing Algorithms for Networks-on-Chip
S Ma, N Enright Jerger, Z Wang
International Symposium on High Performance Computer Architecture, 2012
852012
Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets
P Judd, J Albericio, T Hetherington, T Aamodt, N Enright Jerger, ...
arXiv preprint arXiv:1511.05236, 2015
792015
MEMORY IN DEEP NEURAL NETS
P Judd, J Albericio, T Hetherington, T Aamodt, N Enright Jerger, ...
arXiv preprint arXiv:1511.05236, 2015
792015
Enabling interposer-based disintegration of multi-core processors
A Kannan, N Enright Jerger, GH Loh
Proceedings of the 48th International Symposium on Microarchitecture, 546-558, 2015
772015
DART: a programmable architecture for NoC simulation on FPGAs
D Wang, C Lo, J Vasiljevic, N Enright Jerger, JG Steffan
IEEE Transactions on Computers 63 (3), 664-678, 2014
722014
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Artikelen 1–20