| Fast scalable radix-4 Montgomery modular multiplier SH Wang, WC Lin, JH Ye, MD Shieh 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 3049-3052, 2012 | 38 | 2012 |
| LNAST: A Language Neutral Intermediate Representation for Hardware Description Languages SH Wang, A Sridhar, J Renau | 17 | 2019 |
| LGraph: A Unified Data Model and API for Productive Open-Source Hardware Design SH Wang, RT Possignolo, Q Chen, R Ganpati, J Renau | 17 | 2019 |
| LiveHD: A Productive Live Hardware Development Flow SH Wang, RT Possignolo, HB Skinner, J Renau IEEE Micro, 2020 | 14 | 2020 |
| LGraph: A multilanguage open-source database RT Possignolo, SH Wang, H Skinner, J Renau Open-Source EDA Technology, Proceedings of the First Workshop on, 2018 | 10 | 2018 |
| LiveSim: A fast hot reload simulator for HDLs H Skinner, RT Possignolo, SH Wang, J Renau 2020 IEEE International Symposium on Performance Analysis of Systems and …, 2020 | 7 | 2020 |
| LGraph: A multi-language open-source database for VLSI RT Possignolo, SH Wang, H Skinner, J Renau First Workshop on Open-Source EDA Technology (WOSET), 2018 | 1 | 2018 |
| A Multi-threaded Fast Hardware Compiler for HDLs SH Wang, HJ Coffman, K Mayer, S Garg, J Renau Proceedings of the 32nd ACM SIGPLAN International Conference on Compiler …, 2023 | | 2023 |
| A Fast, Parallel, and Multi-Language Hardware Compilation Framework SH Wang University of California, Santa Cruz, 2022 | | 2022 |
| Design Decisions in LiveHD for HDLs Compilation SH Wang, J Renau | | 2021 |
| A Parallel HDL Compilation Framework SH Wang, S Garg, HJ Coffman, K Mayer, J Renau | | |
| A Guide for Rapid Creation of New HDLs S Garg, SH Wang, HJ Coffman, J Renau | | |
Jose RenauProcessor of Computer Science Engineering, UCSCVerified email at ucsc.edu
