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Nikolaos I. Deligiannis
Nikolaos I. Deligiannis
Politecnico di Torino, Dept. of Control and Computer Engineering
Geverifieerd e-mailadres voor polito.it
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Effective SAT-based Solutions for Generating Functional Sequences Maximizing the Sustained Switching Activity in a Pipelined Processor
NI Deligiannis, R Cantoro, T Faller, T Paxian, B Becker, MS Reorda
2021 IEEE 30th Asian Test Symposium (ATS), 73-78, 2021
102021
Evaluating Data Encryption Effects on the Resilience of an Artificial Neural Network
R Cantoro, NI Deligiannis, MS Reorda, M Traiola, E Valea
2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2020
92020
Towards the Integration of Reliability and Security Mechanisms to Enhance the Fault Resilience of Neural Networks
NI Deligiannis, R Cantoro, MS Reorda, M Traiola, E Valea
IEEE Access 9, 155998-156012, 2021
82021
New Techniques for the Automatic Identification of Uncontrollable Lines in a CPU Core
NI Deligiannis, R Cantoro, M Sauer, B Becker, MS Reorda
2021 IEEE 39th VLSI Test Symposium (VTS), 1-7, 2021
72021
Maximizing the Switching Activity of Different Modules Within a Processor Core via Evolutionary Techniques
NI Deligiannis, R Cantoro, MS Reorda
2021 24th Euromicro Conference on Digital System Design (DSD), 535-540, 2021
52021
Constraint-based automatic SBST generation for RISC-V processor families
T Faller, NI Deligiannis, M Schwörer, MS Reorda, B Becker
2023 IEEE European Test Symposium (ETS), 1-6, 2023
42023
Automating the Generation of Programs Maximizing the Sustained Switching Activity in Microprocessor units via Evolutionary Techniques
NI Deligiannis, R Cantoro, MS Reorda
Microprocessors and Microsystems 98, 104775, 2023
42023
Automating the Generation of Programs Maximizing the Repeatable Constant Switching Activity in Microprocessor Units via MaxSAT
NI Deligiannis, T Faller, R Cantoro, T Paxian, B Becker, MS Reorda
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023
42023
Evaluating the Code Encryption Effects on Memory Fault Resilience
R Cantoro, NI Deligiannis, MS Reorda, M Traiola, E Valea
2020 IEEE Latin-American Test Symposium (LATS), 1-6, 2020
22020
A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors
J Anders, P Andreu, B Becker, S Becker, R Cantoro, NI Deligiannis, ...
2023 IEEE European Test Symposium (ETS), 1-10, 2023
12023
Automating the Generation of Functional Stress Inducing Stimuli for Burn-In Testing
NI Deligiannis, T Faller, Z Chenghan, R Cantoro, B Becker, MS Reorda
2023 IEEE European Test Symposium (ETS), 1-5, 2023
12023
Improving the Fault Resilience of Neural Network Applications Through Security Mechanisms
NI Deligiannis, R Cantoro, MS Reorda, M Traiola, E Valea
2022 52nd Annual IEEE/IFIP International Conference on Dependable Systems …, 2022
12022
Evaluating the Reliability of Integer Multipliers With Respect to Permanent Faults
N Deligiannis, R Cantoro, MS Reorda, SED Habib
Proceedings of the 27th International Symposium on Design and Diagnostics of …, 2024
2024
Automatic Identification of Functionally Untestable Cell-Aware Faults in Microprocessors
NI Deligiannis, T Faller, I Guglielminetti, R Cantoro, B Becker, MS Reorda
2023 IEEE 32nd Asian Test Symposium (ATS), 1-6, 2023
2023
Functional Testing with STLs: A Step Towards Reliable RISC-V-based HPC Commodity Clusters
R Esteban, N Deligiannis, J Sini, R Cantoro, M SONZA REORDA
Proceedings of ISC High Performance 2023, 2023
2023
A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors
A Jens, A Pablo, B Bernd, B Steffen, R Cantoro, N Deligiannis, E Nourhan, ...
Proceedings of European Test Symposium 2023, 2023
2023
Constraint-Based Automatic SBST Generation for RISC-V Processor Families
T Faller, NI Deligiannis, M Schwörer, MS Reorda, B Becker
2023 IEEE European Test Symposium (ETS), 1-6, 2023
2023
Functional Testing with STLs: A Step Towards Reliable RISC-V-based HPC Commodity Clusters
JER Condia, NI Deligiannis, J Sini, R Cantoro, MS Reorda
International Conference on High Performance Computing, 444-457, 2023
2023
Using Formal Methods to Support the Development of STLs for GPUs
NI Deligiannis, T Faller, JER Condia, R Cantoro, B Becker, MS Reorda
2022 IEEE 31st Asian Test Symposium (ATS), 84-89, 2022
2022
New Solutions for Generating Functional Sequences Maximizing the Sustained Switching Activity of Complex SoCs
NI Deligiannis
2022
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Artikelen 1–20