Bertrand Parvais
Bertrand Parvais
imec & VUB
Geverifieerd e-mailadres voor imec.be
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Ultra low-EOT (5 ┼) gate-first and gate-last high performance CMOS achieved by gate-electrode optimization
L┼ Ragnarsson, Z Li, J Tseng, T Schram, E Rohr, MJ Cho, T Kauerauf, ...
2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009
1692009
3D stacked IC demonstration using a through silicon via first approach
J Van Olmen, A Mercha, G Katti, C Huyghebaert, J Van Aelst, E Seppala, ...
2008 IEEE International Electron Devices Meeting, 1-4, 2008
1542008
Planar Bulk MOSFETs Versus FinFETs: An Analog/RF Perspective
V Subramanian, B Parvais, J Borremans, A Mercha, D Linten, P Wambacq, ...
IEEE Transactions on Electron Devices 53 (12), 3071-3079, 2006
1422006
Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession
T Chiarella, L Witters, A Mercha, C Kerner, M Rakowski, C Ortolland, ...
Solid-State Electronics 54 (9), 855-860, 2010
1362010
Fully depleted SOI CMOS technology for heterogeneous micropower, high-temperature or RF microsystems
D Flandre, S Adriaensen, A Akheyar, A Crahay, L Demeűs, P Delatte, ...
Solid-State Electronics 45 (4), 541-549, 2001
1032001
Impact of fin width on digital and analog performances of n-FinFETs
V Subramanian, A Mercha, B Parvais, J Loo, C Gustin, M Dehan, ...
Solid-State Electronics 51 (4), 551-559, 2007
952007
A low-power 57-to-66GHz transceiver in 40nm LP CMOS with− 17dB EVM at 7Gb/s
V Vidojkovic, G Mangraviti, K Khalaf, V Szortyka, K Vaesen, W Van Thillo, ...
2012 IEEE International Solid-State Circuits Conference, 268-270, 2012
932012
A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication
V Vidojkovic, V Szortyka, K Khalaf, G Mangraviti, S Brebels, W Van Thillo, ...
2013 IEEE International Solid-State Circuits Conference Digest of Technicalá…, 2013
772013
Double-gate FinFETs as a CMOS technology downscaling option: An RF perspective
S Nuttinck, B Parvais, G Curatola, A Mercha
IEEE Transactions on electron Devices 54 (2), 279-283, 2007
672007
MoM simulation of signal-to-noise patterns in infinite and finite receiving antenna arrays
C Craeye, B Parvais, X Dardenne
IEEE Transactions on Antennas and Propagation 52 (12), 3245-3256, 2004
662004
Dependence of FinFET RF performance on fin width
D Lederer, B Parvais, A Mercha, N Collaert, M Jurczak, JP Raskin, ...
Digest of Papers. 2006 Topical Meeting on Silicon Monolithic Integratedá…, 2006
652006
Scalable and multibias high frequency modeling of multi-fin FETs
G Crupi, D Schreurs, B Parvais, A Caddemi, A Mercha, S Decoutere
Solid-state electronics 50 (11-12), 1780-1786, 2006
522006
Device and circuit-level analog performance trade-offs: a comparative study of planar bulk FETs versus FinFETs
V Subramaniana, B Parvais, J Borremans, A Mercha, D Linten, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digestá…, 2005
502005
The potential of FinFETs for analog and RF circuit applications
P Wambacq, B Verbruggen, K Scheir, J Borremans, M Dehan, D Linten, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 54 (11), 2541-2551, 2007
452007
21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS
V Szortyka, Q Shi, K Raczkowski, B Parvais, M Kuijk, P Wambacq
2014 IEEE International Solid-State Circuits Conference Digest of Technicalá…, 2014
442014
Stochastic matching properties of FinFETs
C Gustin, A Mercha, J Loo, V Subramanian, B Parvais, M Dehan, ...
IEEE electron device letters 27 (10), 846-848, 2006
422006
Identifying the bottlenecks to the RF performance of FinFETs
V Subramanian, A Mercha, B Parvais, M Dehan, G Groeseneken, ...
2010 23rd International Conference on VLSI Design, 111-116, 2010
402010
High-frequency noise performance of 60-nm gate-length FinFETs
JP Raskin, G Pailloncy, D Lederer, F Danneville, G Dambrine, ...
IEEE transactions on electron devices 55 (10), 2718-2727, 2008
402008
Determination and validation of new nonlinear FinFET model based on lookup tables
G Crupi, DMMP Schreurs, D Xiao, A Caddemi, B Parvais, A Mercha, ...
IEEE microwave and wireless components letters 17 (5), 361-363, 2007
372007
Migrating from planar to FinFET for further CMOS scaling: SOI or bulk?
T Chiarella, L Witters, A Mercha, C Kerner, R Dittrich, M Rakowski, ...
2009 Proceedings of the European Solid State Device Research Conference, 85-88, 2009
352009
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