Jason Oberg
Jason Oberg
Co-founder and CEO of Tortuga Logic, Inc.
Geverifieerd e-mailadres voor cs.ucsd.edu - Homepage
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Fpga-based face detection system using haar classifiers
J Cho, S Mirzaei, J Oberg, R Kastner
Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2009
2182009
Accelerating Viola-Jones face detection to FPGA-level using GPUs
D Hefenbrock, J Oberg, NTN Thanh, R Kastner, SB Baden
2010 18th IEEE Annual International Symposium on Field-Programmable Custom …, 2010
1352010
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
M Tiwari, JK Oberg, X Li, J Valamehr, T Levin, B Hardekopf, R Kastner, ...
2011 38th Annual International Symposium on Computer Architecture (ISCA …, 2011
1242011
Surfnoc: A low latency and provably non-interfering approach to secure networks-on-chip
HMG Wassel, Y Gao, JK Oberg, T Huffmire, R Kastner, FT Chong, ...
ACM SIGARCH Computer Architecture News 41 (3), 583-594, 2013
1152013
Sapper: A language for hardware-level security policy enforcement
X Li, V Kashyap, JK Oberg, M Tiwari, VR Rajarathinam, R Kastner, ...
Proceedings of the 19th international conference on Architectural support …, 2014
1022014
Caisson: a hardware description language for secure information flow
X Li, M Tiwari, JK Oberg, V Kashyap, FT Chong, T Sherwood, ...
ACM Sigplan Notices 46 (6), 109-120, 2011
1022011
Information flow isolation in I2C and USB
J Oberg, W Hu, A Irturk, M Tiwari, T Sherwood, R Kastner
2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC), 254-259, 2011
642011
Detecting hardware trojans with gate-level information-flow tracking
W Hu, B Mao, J Oberg, R Kastner
Computer 49 (8), 44-52, 2016
532016
Theoretical fundamentals of gate level information flow tracking
W Hu, J Oberg, A Irturk, M Tiwari, T Sherwood, D Mu, R Kastner
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
452011
Minimal multi-threading: Finding and removing redundant instructions in multi-threaded processors
G Long, D Franklin, S Biswas, P Ortiz, J Oberg, D Fan, FT Chong
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 337-348, 2010
402010
Random Decision Tree Body Part Recognition Using FPGAs
J Oberg, K Eguro, R Bittner, A Forin
Field Programmable Logic and Applications (FPL), 2012 22nd International …, 2012
352012
Theoretical analysis of gate level information flow tracking
J Oberg, W Hu, A Irturk, M Tiwari, T Sherwood, R Kastner
Design Automation Conference, 244-247, 2010
342010
Leveraging gate-level properties to identify hardware timing channels
J Oberg, S Meiklejohn, T Sherwood, R Kastner
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
332014
Networks on chip with provable security properties
HMG Wassel, Y Gao, JK Oberg, T Huffmire, R Kastner, FT Chong, ...
IEEE Micro 34 (3), 57-68, 2014
332014
On the complexity of generating gate level information flow tracking logic
W Hu, J Oberg, A Irturk, M Tiwari, T Sherwood, D Mu, R Kastner
IEEE Transactions on Information Forensics and Security 7 (3), 1067-1080, 2012
272012
Gate-level information flow tracking for security lattices
W Hu, D Mu, J Oberg, B Mao, M Tiwari, T Sherwood, R Kastner
ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (1 …, 2014
212014
Eliminating timing information flows in a mix-trusted system-on-chip
J Oberg, T Sherwood, R Kastner
IEEE Design & Test 30 (2), 55-62, 2013
192013
A software-based dynamic-warp scheduling approach for load-balancing the Viola–Jones face detection algorithm on GPUs
T Nguyen, D Hefenbrock, J Oberg, R Kastner, S Baden
Journal of Parallel and Distributed Computing 73 (5), 677-685, 2013
182013
Decision tree computation in hardware utilizing a physically distinct integrated circuit with on-chip memory and a reordering of data to be grouped
J Oberg, K Eguro, V Tirva, P Parthasarathy, S Carrie, A Forin, J Chow
US Patent 9,292,767, 2016
172016
Method and systems for detecting and isolating hardware timing channels
R Kastner, J Oberg, S Meiklejohn, T Sherwood
US Patent 9,305,166, 2016
142016
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