Christian Benkeser
Christian Benkeser
Engineering Manager, Hardware Project Lead at Intel Deutschland GmbH
Verified email at iis.ee.ethz.ch - Homepage
TitleCited byYear
Design and implementation of a parallel turbo-decoder ASIC for 3GPP-LTE
C Studer, C Benkeser, S Belfanti, Q Huang
IEEE Journal of Solid-State Circuits 46 (1), 8-17, 2010
1772010
Design and optimization of an HSDPA turbo decoder ASIC
C Benkeser, A Burg, T Cupaiuolo, Q Huang
IEEE Journal of Solid-State Circuits 44 (1), 98-106, 2008
872008
A 1Gbps LTE-advanced turbo-decoder ASIC in 65nm CMOS
S Belfanti, C Roth, M Gautschi, C Benkeser, Q Huang
2013 Symposium on VLSI Circuits, C284-C285, 2013
562013
VLSI design of a monolithic compressive-sensing wideband analog-to-information converter
DE Bellasi, L Bettini, C Benkeser, T Burger, Q Huang, C Studer
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 3 (4 …, 2013
472013
Efficient parallel turbo-decoding for high-throughput wireless systems
C Roth, S Belfanti, C Benkeser, Q Huang
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (6), 1824-1835, 2014
412014
A 390Mb/s 3.57mm23GPP-LTE turbo decoder ASIC in 0.13µm CMOS
C Studer, C Benkeser, S Belfanti, Q Huang
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 274-275, 2010
352010
Implementation trade-offs of soft-input soft-output MAP decoders for convolutional codes
C Studer, S Fateh, C Benkeser, Q Huang
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (11), 2774-2783, 2012
302012
On the exploitation of the inherent error resilience of wireless systems under unreliable silicon
G Karakonstantis, C Roth, C Benkeser, A Burg
DAC Design Automation Conference 2012, 510-515, 2012
292012
A 58mW 1.2mm2HSDPA Turbo Decoder ASIC in 0.13μm CMOS
C Benkeser, A Burg, T Cupaiuolo, Q Huang
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
222008
Data mapping for unreliable memories
C Roth, C Benkeser, C Studer, G Karakonstantis, A Burg
2012 50th Annual Allerton Conference on Communication, Control, and …, 2012
182012
A 1.9 GS/s 4-bit sub-Nyquist flash ADC for 3.8 GHz compressive spectrum sensing in 28 nm CMOS
D Bellasi, L Bettini, T Burger, Q Huang, C Benkeser, C Studer
2014 IEEE 57th International Midwest Symposium on Circuits and Systems …, 2014
162014
Turbo decoder design for high code rates
C Benkeser, C Roth, Q Huang
2012 IEEE/IFIP 20th international conference on VLSI and system-on-chip …, 2012
152012
A 50mW HSDPA Baseband Receiver ASIC with Multimode Digital Front-End
C Martelli, R Reutemann, C Benkeser, Q Huang
2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007
142007
A 4.5 mW digital baseband receiver for level-A evolved EDGE
C Benkeser, A Bubenhofer, Q Huang
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 276-277, 2010
132010
Power efficiency and the mapping of communication algorithms into VLSI
C Benkeser
ETH Zurich, 2010
102010
Efficient Channel Shortening for Higher Order Modulation: Algorithm and Architecture
C Benkeser, S Zwicky, H Kröll, J Widmer, Q Huang
92012
An evolved GSM/EDGE baseband ASIC supporting Rx diversity
H Kröll, S Zwicky, B Weber, C Roth, D Tschopp, C Benkeser, A Burg, ...
IEEE Journal of Solid-State Circuits 50 (7), 1690-1701, 2015
82015
Low-complexity frequency synchronization for GSM systems: Algorithms and implementation
H Kröll, S Zwicky, C Benkeser, Q Huang, A Burg
2012 IV International Congress on Ultra Modern Telecommunications and …, 2012
72012
An evolved EDGE PHY ASIC supporting soft-output equalization and RX diversity
H Kröll, S Zwicky, B Weber, C Roth, C Benkeser, A Burg, Q Huang
ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 203-206, 2014
62014
Baseband Signal Processing Framework for the OsmocomBB GSM Protocol Stack
H Kröll, C Benkeser, S Zwicky, B Weber, Q Huang
62012
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Articles 1–20