| Outerspace: An outer product based sparse matrix multiplication accelerator S Pal, J Beaumont, DH Park, A Amarnath, S Feng, C Chakrabarti, HS Kim, ... 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 279 | 2018 |
| Sparse-TPU: Adapting systolic arrays for sparse matrices X He, S Pal, A Amarnath, S Feng, DH Park, A Rovinski, H Ye, Y Chen, ... Proceedings of the 34th ACM international conference on supercomputing, 1-12, 2020 | 89 | 2020 |
| A 7.3 m output non-zeros/j, 11.7 m output non-zeros/gb reconfigurable sparse matrix–matrix multiplication accelerator DH Park, S Pal, S Feng, P Gao, J Tan, A Rovinski, S Xie, C Zhao, ... IEEE Journal of Solid-State Circuits 55 (4), 933-944, 2020 | 32 | 2020 |
| Transmuter: Bridging the efficiency gap using memory and dataflow reconfiguration S Pal, S Feng, D Park, S Kim, A Amarnath, CS Yang, X He, J Beaumont, ... Proceedings of the ACM International Conference on Parallel Architectures …, 2020 | 29 | 2020 |
| A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm S Pal, D Park, S Feng, P Gao, J Tan, A Rovinski, S Xie, C Zhao, ... 2019 Symposium on VLSI Technology, C150-C151, 2019 | 26 | 2019 |
| Cosparse: A software and hardware reconfigurable spmv framework for graph analytics S Feng, J Sun, S Pal, X He, K Kaszyk, D Park, M Morton, T Mudge, M Cole, ... 2021 58th ACM/IEEE Design Automation Conference (DAC), 949-954, 2021 | 21 | 2021 |
| SparseAdapt: Runtime control for sparse linear algebra on a reconfigurable accelerator S Pal, A Amarnath, S Feng, M O'Boyle, R Dreslinski, C Dubach MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 19 | 2021 |
| Menda: A near-memory multi-way merge solution for sparse transposition and dataflows S Feng, X He, KY Chen, L Ke, X Zhang, D Blaauw, T Mudge, R Dreslinski Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 18 | 2022 |
| A 507 gmacs/j 256-core domain adaptive systolic-array-processor for wireless communication and linear-algebra kernels in 12nm finfet KY Chen, CS Yang, YH Sun, CW Tseng, M Fayazi, X He, S Feng, Y Yue, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 13 | 2022 |
| Parallelism analysis of prominent desktop applications: An 18-year perspective S Feng, S Pal, Y Yang, RG Dreslinski 2019 IEEE International Symposium on Performance Analysis of Systems and …, 2019 | 10 | 2019 |
| A carbon nanotube transistor based RISC-V processor using pass transistor logic A Amarnath, S Feng, S Pal, T Ajayi, A Rovinski, RG Dreslinski 2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017 | 8 | 2017 |
| HETSIM: Simulating large-scale heterogeneous systems using a trace-driven, synchronization and dependency-aware framework S Pal, K Kaszyk, S Feng, B Franke, M Cole, M O'Boyle, T Mudge, ... 2020 IEEE International Symposium on Workload Characterization (IISWC), 13-24, 2020 | 3 | 2020 |
| Squaring the circle: Executing Sparse Matrix Computations on FlexTPU---A TPU-Like Processor X He, KY Chen, S Feng, HS Kim, D Blaauw, R Dreslinski, T Mudge Proceedings of the International Conference on Parallel Architectures and …, 2022 | 1 | 2022 |
| DAP: A 507-GMACs/J 256-Core Domain Adaptive Processor for Wireless Communication and Linear Algebra Kernels in 12-nm FINFET KY Chen, CS Yang, YH Sun, CW Tseng, M Fayazi, X He, S Feng, Y Yue, ... IEEE Journal of Solid-State Circuits, 2024 | | 2024 |
| Accelerating Graph Analytics on a Reconfigurable Architecture with a Data-Indirect Prefetcher Y Yang, J Li, N Talati, S Pal, S Feng, C Chakrabarti, T Mudge, ... arXiv preprint arXiv:2301.12312, 2023 | | 2023 |
| Acceleration Techniques of Sparse Linear Algebra on Emerging Architectures S Feng | | 2022 |
Ronald DreslinskiUniversity of MichiganGeverifieerd e-mailadres voor umich.edu
