H.-S. Philip Wong
H.-S. Philip Wong
Professor of Electrical Engineering, Stanford University
Verified email at stanford.edu
Title
Cited by
Cited by
Year
Metal–oxide RRAM
HSP Wong, HY Lee, S Yu, YS Chen, Y Wu, PS Chen, B Lee, FT Chen, ...
Proceedings of the IEEE 100 (6), 1951-1970, 2012
20772012
Device scaling limits of Si MOSFETs and their application dependencies
DJ Frank, RH Dennard, E Nowak, PM Solomon, Y Taur, HSP Wong
Proceedings of the IEEE 89 (3), 259-288, 2001
17052001
Phase change memory
HSP Wong, S Raoux, SB Kim, J Liang, JP Reifenberg, B Rajendran, ...
Proceedings of the IEEE 98 (12), 2201-2227, 2010
15702010
CMOS scaling into the nanometer regime
Y Taur, DA Buchanan, W Chen, DJ Frank, KE Ismail, SH Lo, ...
Proceedings of the IEEE 85 (4), 486-504, 1997
11821997
Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing
D Kuzum, RGD Jeyasingh, B Lee, HSP Wong
Nano letters 12 (5), 2179-2186, 2012
9122012
Carbon nanotube computer
MM Shulaker, G Hills, N Patil, H Wei, HY Chen, HSP Wong, S Mitra
Nature 501 (7468), 526-530, 2013
9112013
Synaptic electronics: materials, devices and applications
D Kuzum, S Yu, HSP Wong
Nanotechnology 24 (38), 382001, 2013
8162013
MoS2 transistors with 1-nanometer gate lengths
SB Desai, SR Madhvapathy, AB Sachid, JP Llinas, Q Wang, GH Ahn, ...
Science 354 (6308), 99-102, 2016
8142016
A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part I: Model of the intrinsic channel region
J Deng, HSP Wong
IEEE Transactions on Electron Devices 54 (12), 3186-3194, 2007
8112007
Beyond the conventional transistor
HSP Wong
IBM Journal of Research and Development 46 (2.3), 133-168, 2002
7652002
A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part II: Full device model and circuit performance benchmarking
J Deng, HSP Wong
IEEE Transactions on Electron Devices 54 (12), 3195-3205, 2007
6862007
Nanoscale cmos
HSP Wong, DJ Frank, PM Solomon, CHJ Wann, JJ Welser
Proceedings of the IEEE 87 (4), 537-570, 1999
6311999
An electronic synapse device based on metal oxide resistive switching memory for neuromorphic computation
S Yu, Y Wu, R Jeyasingh, D Kuzum, HSP Wong
IEEE Transactions on Electron Devices 58 (8), 2729-2737, 2011
6072011
Memory leads the way to better computing
HSP Wong, S Salahuddin
Nature nanotechnology 10 (3), 191-194, 2015
5102015
In-memory computing with resistive switching devices
D Ielmini, HSP Wong
Nature Electronics 1 (6), 333-343, 2018
4732018
Carbon nanotube and graphene device physics
HSP Wong, D Akinwande
Cambridge University Press, 2011
4292011
The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance
T Skotnicki, JA Hutchby, TJ King, HSP Wong, F Boeuf
IEEE Circuits and Devices Magazine 21 (1), 16-26, 2005
4242005
Face classification using electronic synapses
P Yao, H Wu, B Gao, SB Eryilmaz, X Huang, W Zhang, Q Zhang, N Deng, ...
Nature communications 8 (1), 1-8, 2017
4192017
Device design considerations for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFET's at the 25 nm channel length generation
HSP Wong, DJ Frank, PM Solomon
International Electron Devices Meeting 1998. Technical Digest (Cat. No …, 1998
4141998
Technology and device scaling considerations for CMOS imagers
HS Wong
IEEE Transactions on electron Devices 43 (12), 2131-2142, 1996
3961996
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