Michael E. Imhof
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Module Diversification: Fault Tolerance and Aging Mitigation for Runtime Reconfigurable Architectures
H Zhang, L Bauer, MA Kochte, E Schneider, C Braun, ME Imhof, ...
IEEE International Test Conference (ITC13), 1-10, 2013
Scan chain clustering for test power reduction
M Elm, HJ Wunderlich, ME Imhof, CG Zoellin, J Leenstra, N Maeding
45th ACM/IEEE Design Automation Conference (DAC08), 828-833, 2008
Test strategies for reliable runtime reconfigurable architectures
L Bauer, C Braun, ME Imhof, MA Kochte, E Schneider, H Zhang, J Henkel, ...
IEEE Transactions on Computers 62 (8), 1494-1507, 2013
Scan test planning for power reduction
ME Imhof, CG Zoellin, HJ Wunderlich, N Maeding, J Leenstra
44th ACM/IEEE Design Automation Conference (DAC07), 521-526, 2007
High-Throughput Logic Timing Simulation on GPGPUs
S Holst, ME Imhof, HJ Wunderlich
ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (3), 37, 2015
GUARD: GUAranteed Reliability in Dynamically Reconfigurable Systems
H Zhang, MA Kochte, ME Imhof, L Bauer, HJ Wunderlich, J Henkel
51st ACM/IEEE Design Automation Conference (DAC), 1-6, 2014
Transparent Structural Online Test for Reconfigurable Systems
MS Abdelfattah, L Bauer, C Braun, ME Imhof, MA Kochte, H Zhang, ...
18th IEEE International On-Line Testing Symposium (IOLTS12), 37-42, 2012
Variation-Aware Fault Grading
A Czutro, ME Imhof, J Jiang, A Mumtaz, M Sauer, B Becker, I Polian, ...
21st IEEE Asian Test Symposium (ATS12), 344-349, 2012
Synthesis of Workload Monitors for On-Line Stress Prediction
R Baranowski, A Cook, ME Imhof, C Liu, HJ Wunderlich
IEEE Symp. Defect and Fault Tolerance in VLSI and Nanotechnology Systems …, 2013
Variation-Aware Deterministic ATPG
M Sauer, I Polian, ME Imhof, A Mumtaz, E Schneider, A Czutro, ...
19th IEEE European Test Symposium (ETS), 87-92, 2014
Structural Software-Based Self-Test of Network-on-Chip
A Dalirsani, ME Imhof, HJ Wunderlich
IEEE VLSI Test Symposium (VTS), 1-6, 2014
OTERA: Online test strategies for reliable reconfigurable architectures
L Bauer, C Braun, ME Imhof, MA Kochte, H Zhang, HJ Wunderlich, ...
NASA/ESA Conference on Adaptive Hardware and Systems (AHS12), 38-45, 2012
Integrating scan design and soft error correction in low-power applications
ME Imhof, HJ Wunderlich, CG Zoellin
14th IEEE International On-Line Testing Symposium (IOLTS08), 59-64, 2008
Efficient multi-level fault simulation of HW/SW systems for structural faults
R Baranowski, S Di Carlo, N Hatami, ME Imhof, MA Kochte, P Prinetto, ...
SCIENCE CHINA Information Sciences 54 (9), 1784-1796, 2011
Soft error correction in embedded storage elements
ME Imhof, HJ Wunderlich
17th IEEE International On-Line Testing Symposium (IOLTS11), 169-174, 2011
Test set stripping limiting the maximum number of specified bits
MA Kochte, CG Zoellin, ME Imhof, HJ Wunderlich
4th IEEE International Symposium on Electronic Design, Test and Applications …, 2008
A Pseudo-Dynamic Comparator for Error Detection in Fault Tolerant Architectures
DA Tran, A Virazel, A Bosio, L Dilillo, P Girard, A Todri, ME Imhof, ...
30th IEEE VLSI Test Symposium (VTS12), 50-55, 2012
Efficient simulation of structural faults for the reliability evaluation at system-level
MA Kochte, CG Zoellin, R Baranowski, ME Imhof, H Wunderlich, N Hatami, ...
19th IEEE Asian Test Symposium (ATS10), 3-8, 2010
Bit-Flipping Scan - A Unified Architecture for Fault Tolerance and Offline Test
ME Imhof, HJ Wunderlich
Design, Automation & Test in Europe (DATE), 1-6, 2014
P-PET: Partial Pseudo-Exhaustive Test for High Defect Coverage
A Mumtaz, ME Imhof, HJ Wunderlich
IEEE International Test Conference (ITC11), 1-8, 2011
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