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Joao Leonardo Fragoso
Joao Leonardo Fragoso
Professor, UERGS
Geverifieerd e-mailadres voor uergs.edu.br
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TAST CAD Tools: Tutorial
AVD Duc, JB Rigaud, A Rezzag, A Sirianni, J Fragoso, L Fesquet, ...
tutorial given at the International Symposium on Advanced Research in …, 2002
192002
Tast CAD tools
AVD Duc, JB Rigaud, A Rezzag, A Sirianni, J Fragoso, L Fesquet, ...
Asynchronous Circuit Design, Munich, Germany, 2002
192002
Asynchronous circuits design: An architectural approach
M Renaudin, J Fragoso, J Guntzel, R Reis
Guntzel J. and Reis R. V Escola de Microeletrônica da SBC-Sul, Rio Grande …, 2003
122003
Tast cad tools
M Renaudin, JB Rigaud, A Dinhduc, A Rezzag, A Sirianni, J Fragoso
ASYNC02 TUTORIAL, ISRN: TIMARR-02/04/01FR, 2002
122002
Specification and design of an Ethernet Interface soft IP
JL Fragoso, E Costa, J Rochol, S Bampi, R Reis
Journal of the Brazilian Computer Society 6 (3), 05-12, 2000
9*2000
TAST CAD Tools
AV Dinh Duc, JB Rigaud, A Rezzag, A Sirianni, J Fragoso, L Fesquet, ...
ACiD-WG workshop, 2002
82002
Automatic generation of 1-of-M QDI asynchronous adders
J Fragoso, G Sicard, M Renaudin
Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings. 16th …, 2003
72003
Power/area tradeoffs in 1-of-M parallel-prefix asynchronous adders
J Fragoso, G Sicard, M Renaudin
Integrated Circuit and System Design. Power and Timing Modeling …, 2003
62003
Tima asynchronous synthesis tools
A Dindhuc, JB Rigaud, A Rezzag, A Sirianni, JL Fragoso, L Fesquet, ...
Communication to ACID Worshop, 2002
62002
Low Power Asynchronous Processors
K Slimani, J Fragoso, L Fesquet, M Renaudin
Low-Power Electronics Design, 2004
4*2004
Path Enumeration Algorithms for Timing Analysis of Digital Circuits
JL GÜNTZEL, ACM Pinto, JL Fragoso, GD Pizzol, R Reis
WORKSHOP IBERCHIP 5, 334-341, 1999
21999
Conception automatique de chemins de données en logique asynchrone QDI
J Fragoso
Institut National Polytechnique de Grenoble-INPG, 2005
12005
WTROPIC: a www-based macro-cell generator
JL Fragoso, F Moraes, R Reis
Integrated Circuits and Systems Design, 2000. Proceedings. 13th Symposium on …, 2000
12000
Low-area ASIC implementation for configurable coefficients FIR pulse shape filters of digital TV systems
WV Silvério, JD Costa, JL Fragoso, JL Silva Jr
Proceedings of the 21st annual symposium on Integrated circuits and system …, 2008
2008
Estimation rapide du couple énergie/délai des circuits asynchrones QDI
J Fragoso, G Sicard, M Renaudin
TECHNIQUE ET SCIENCE INFORMATIQUES 26 (5), 535, 2007
2007
Kamel Slimani Joao Fragoso Mohammed Es Sahliene Laurent Fesquet Marc Renaudin
J Fragoso
Low-Power Processors and Systems on Chips, 2005
2005
Fast Performance Comparison of Asynchronous Circuits
J Fragoso, G Sicard, M Renaudin
Proceddings of 5ème journées d'études Faible Tension, Faible Consommation …, 2005
2005
La conception de circuits asynchrones et la faible consommation
M Renaudin, L Fesquet, G Sicard, K Slimani, J Fragoso, E Allier, ...
2003
Generalized 1-of-M QDI Asynchronous Adders
J Fragoso, G Sicard, M Renaudin
2003
Generalized 1 of M QDI adders
J Fragoso, G Sicard, M Renaudin
2003
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Artikelen 1–20