Razi Seyyedi
Razi Seyyedi
OFFIS - Institute for Information Technology
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Geciteerd door
Geciteerd door
Comprehensive analysis of alpha and neutron particle-induced soft errors in an embedded processor at nanoscales
M Ebrahimi, A Evans, MB Tahoori, R Seyyedi, E Costenaro, ...
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
Comprehensive analysis of sequential and combinational soft errors in an embedded processor
M Ebrahimi, A Evans, MB Tahoori, E Costenaro, D Alexandrescu, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
Protecting SRAM-based FPGAs against multiple bit upsets using erasure codes
PMB Rao, M Ebrahimi, R Seyyedi, MB Tahoori
2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2014
Low-cost multiple bit upset correction in SRAM-based FPGA configuration frames
M Ebrahimi, PMB Rao, R Seyyedi, MB Tahoori
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (3), 932-943, 2015
SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems
M Fakih, A Lenz, M Azkarate-Askasua, J Coronel, A Crespo, ...
Microprocessors and Microsystems 52, 89-105, 2017
Event-driven transient error propagation: A scalable and accurate soft error rate estimation approach
M Ebrahimi, R Seyyedi, L Chen, MB Tahoori
The 20th Asia and South Pacific Design Automation Conference, 743-748, 2015
Modeling symmetrical independent gate FinFET using predictive technology model
MY Zarei, R Asadpour, S Mohammadi, A Afzali-Kusha, R Seyyedi
Proceedings of the 23rd ACM international conference on Great lakes …, 2013
Towards virtual prototyping of synchronous real-time systems on noc-based mpsocs
R Seyyedi, M Mohammadat, M Fakih, K Gruttner, J Oberg, D Graham
2017 12th IEEE International Symposium on Industrial Embedded Systems (SIES …, 2017
Functional Test Environment for Time-Triggered Control Systems in Complex MPSoCs using GALI
R Seyyedi, S Schreiner, M Fakih, K Grüttner, W Nebel
2018 21st Euromicro Conference on Digital System Design (DSD), 711-718, 2018
Towards power management verification of time-triggered systems using virtual platforms
S Schreiner, R Seyyedi, M Fakih, K Grüttner, W Nebel
Proceedings of the 18th International Conference on Embedded Computer …, 2018
Experimental Evaluation of SAFEPOWER Architecture for Safe and Power-Efficient Mixed-Criticality Systems
M Fakih, K Grüttner, S Schreiner, R Seyyedi, M Azkarate-Askasua, ...
Journal of Low Power Electronics and Applications 9 (1), 12, 2019
A Low Power Approach by Memory Managing for Reconfigurable FSM-based Hardware Systems
R Seyyedi, MB Ghaznavi-Ghoushchi, M Hoseinzadeh
International Conference on Computer and Electrical Engineering (ICCEE), 2010
Functional Test Environment for Time-Triggered Control Systems in Complex MPSoCs
R Seyyedi, S Schreiner, M Fakih, K Grüttner, W Nebel
Microprocessors and Microsystems, 103072, 2020
A Programmable Processor for Reconfigurable Hardware FSM-based Intrusion Detection Systems
M Hoseinzadeh, MB Ghaznavi-Ghoushchi, R Seyyedi
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