Susmita Sur-Kolay
Susmita Sur-Kolay
Professor of Computer Science
Geverifieerd e-mailadres voor isical.ac.in - Homepage
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Systematic poisoning attacks on and defenses for machine learning in healthcare
M Mozaffari-Kermani, S Sur-Kolay, A Raghunathan, NK Jha
IEEE journal of biomedical and health informatics 19 (6), 1893-1905, 2014
1082014
A modeling approach for addressing power supply switching noise related failures of integrated circuits
C Tirumurti, S Kundu, S Sur-Kolay, YS Chang
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
882004
Energy-efficient long-term continuous personal health monitoring
AM Nia, M Mozaffari-Kermani, S Sur-Kolay, A Raghunathan, NK Jha
IEEE Transactions on Multi-Scale Computing Systems 1 (2), 85-98, 2015
802015
Wearable medical sensor-based system design: A survey
A Mosenia, S Sur-Kolay, A Raghunathan, NK Jha
IEEE Transactions on Multi-Scale Computing Systems 3 (2), 124-138, 2017
742017
Routing of L-shaped channels, switchboxes and staircases in manhattan-diagonal model
S Das, S Sur-Kolay, BB Bhattacharya
Proceedings Eleventh International Conference on VLSI Design, 65-70, 1998
691998
Floorplanning for partially reconfigurable FPGAs
P Banerjee, M Sangtani, S Sur-Kolay
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
462010
PAQCS: Physical design-aware fault-tolerant quantum circuit synthesis
CC Lin, S Sur-Kolay, NK Jha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (7 …, 2014
432014
CABA: Continuous authentication based on BioAura
A Mosenia, S Sur-Kolay, A Raghunathan, NK Jha
IEEE Transactions on Computers 66 (5), 759-772, 2016
422016
Physiological information leakage: A new frontier in health information security
AM Nia, S Sur-Kolay, A Raghunathan, NK Jha
IEEE Transactions on Emerging Topics in Computing 4 (3), 321-334, 2015
352015
Linear nearest neighbor synthesis of reversible circuits by graph partitioning
A Chakrabarti, S Sur-Kolay, A Chaudhury
arXiv preprint arXiv:1112.0564, 2011
352011
Secure public verification of IP marks in FPGA design through a zero-knowledge protocol
D Saha, S Sur-Kolay
IEEE transactions on very large scale integration (VLSI) systems 20 (10 …, 2011
342011
Nearest neighbour based synthesis of quantum boolean circuits
A Chakrabarty, S Sur Kolay
342007
The cycle structure of channel graphs in nonsliceable floorplans and a unified algorithm for feasible routing order
S Sur-Kolay, BB Bhattacharya
1991 IEEE International Conference on Computer Design: VLSI in Computers and …, 1991
271991
Combined instruction and loop parallelism in array synthesis for FPGAs
S Derrien, S Rajopadhye, SS Kolay
Proceedings of the 14th international symposium on Systems synthesis, 165-170, 2001
262001
Synthesis techniques for ternary quantum logic
SB Mandal, A Chakrabarti, S Sur-Kolay
2011 41st IEEE International Symposium on Multiple-Valued Logic, 218-223, 2011
252011
Fast unified floorplan topology generation and sizing on heterogeneous FPGAs
P Banerjee, S Sur-Kolay, A Bishnu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
242009
Fast FPGA placement using space-filling curve
P Banerjee, S Bhattacharjee, S Sur-Kolay, S Das, SC Nandy
International Conference on Field Programmable Logic and Applications, 2005 …, 2005
212005
Efficient algorithms for vertex arboricity of planar graphs
A Roychoudhury, S Sur-Kolay
International Conference on Foundations of Software Technology and …, 1995
211995
Fast robust intellectual property protection for VLSI physical design
D Saha, S Sur-Kolay
10th International Conference on Information Technology (ICIT 2007), 1-6, 2007
202007
Fsimac: A fault simulator for asynchronous sequential circuits
S Sur-Kolay, M Roncken, K Stevens, PP Chaudhuri, R Roy
Proceedings of the Ninth Asian Test Symposium, 114-119, 2000
202000
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Artikelen 1–20