Mark van Dal
Mark van Dal
Technical Manager TSMC
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Cited by
Cited by
Barrier layer for FinFET channels
RK Oxland, M Van Dal, MC Holland, G Vellianitis, M Passlack
US Patent 9,214,555, 2015
Strained channel field effect transistor
M Van Dal, G Doornbos, G Vellianitis, TL Lee, F Yuan
US Patent 9,761,666, 2017
The Kirkendall effect in multiphase diffusion
A Paul, MJH Van Dal, AA Kodentsov, FJJ Van Loo
Acta Materialia 52 (3), 623-630, 2004
Ni-and Co-based silicides for advanced CMOS applications
JA Kittl, A Lauwers, O Chamirian, M Van Dal, A Akheyar, M De Potter, ...
Microelectronic Engineering 70 (2-4), 158-165, 2003
Multi-gate devices for the 32 nm technology node and beyond
N Collaert, A De Keersgieter, A Dixit, I Ferain, LS Lai, D Lenoble, ...
Solid-State Electronics 52 (9), 1291-1296, 2008
Intrinsic diffusion and Kirkendall effect in Ni–Pd and Fe–Pd solid solutions
MJH Van Dal, M Pleumeekers, AA Kodentsov, FJJ Van Loo
Acta Materialia 48 (2), 385-396, 2000
Solid phase epitaxy versus random nucleation and growth in sub-20nm wide fin field-effect transistors
R Duffy, MJH Van Dal, BJ Pawlak, M Kaiser, RGR Weemaes, B Degroote, ...
Applied Physics Letters 90 (24), 2007
Highly manufacturable FinFETs with sub-10nm fin width and high aspect ratio fabricated with immersion lithography
MJH Van Dal, N Collaert, G Doornbos, G Vellianitis, G Curatola, ...
2007 IEEE symposium on VLSI technology, 110-111, 2007
Systematic TLM measurements of NiSi and PtSi specific contact resistance to n-and p-type Si in a broad doping range
N Stavitski, MJH Van Dal, A Lauwers, C Vrancken, AY Kovalgin, ...
IEEE electron device letters 29 (4), 378-381, 2008
Demonstration of scaled Ge p-channel FinFETs integrated on Si
MJH Van Dal, G Vellianitis, G Doornbos, B Duriez, TM Shen, CC Wu, ...
2012 International Electron Devices Meeting, 23.5. 1-23.5. 4, 2012
Ni based silicides for 45 nm CMOS and beyond
A Lauwers, JA Kittl, MJH Van Dal, O Chamirian, MA Pawlak, M de Potter, ...
Materials Science and Engineering: B 114, 29-41, 2004
Work function of Ni silicide phases on HfSiON and SiO/sub 2: NiSi, Ni/sub 2/Si, Ni/sub 31/Si/sub 12/, and Ni/sub 3/Si fully silicided gates
JA Kittl, MA Pawlak, A Lauwers, C Demeurisse, K Opsomer, KG Anil, ...
IEEE electron device letters 27 (1), 34-36, 2005
Microstructural stability of the Kirkendall plane in solid-state diffusion
MJH Van Dal, AM Gusak, C Cserháti, AA Kodentsov, FJJ Van Loo
Physical review letters 86 (15), 3352, 2001
Vertical gate-all-around field effect transistors and methods of forming same
MC Holland, B Duriez, M Van Dal
US Patent 9,520,466, 2016
Intrinsic diffusion in Ni3Al system
C Cserhati, A Paul, AA Kodentsov, MJH Van Dal, FJJ Van Loo
Intermetallics 11 (4), 291-297, 2003
Germanium p-channel FinFET fabricated by aspect ratio trapping
MJH Van Dal, G Vellianitis, B Duriez, G Doornbos, CH Hsieh, BH Lee, ...
IEEE Transactions on Electron Devices 61 (2), 430-436, 2014
Silicides and germanides for nano-CMOS applications
JA Kittl, K Opsomer, C Torregiani, C Demeurisse, S Mertens, DP Brunco, ...
Materials Science and Engineering: B 154, 144-154, 2008
Method for manufacturing semiconductor device and semiconductor device
G Curatola, P Agarwal, MJH Van Dal, V Madakasira
US Patent App. 12/918,398, 2011
Fin field effect transistor layout for stress optimization
G Doornbos, M Van Dal
US Patent 8,766,364, 2014
An ultralow-resistance ultrashallow metallic source/drain contact scheme for III–V NMOS
R Oxland, SW Chang, X Li, SW Wang, G Radhakrishnan, W Priyantha, ...
IEEE electron device letters 33 (4), 501-503, 2012
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