Yanxiang Huang
TitleCited byYear
An energy efficient 18Gbps LDPC decoding processor for 802.11 ad in 28nm CMOS
M Li, JW Weijers, V Derudder, I Vos, M Rykunov, S Dupont, P Debacker, ...
2015 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-5, 2015
142015
Area and energy efficient 802.11 ad LDPC decoding processor
M Li, Y Lee, Y Huang, L Van der Perre
Electronics Letters 51 (4), 339-341, 2015
132015
Computation-skip error mitigation scheme for power supply voltage scaling in recursive applications
Y Huang, M Li, C Li, P Debacker, L Van der Perre
Journal of Signal Processing Systems 84 (3), 413-424, 2016
102016
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers
Y Huang, A Kapoor, R Rutten, JP de Gyvez
Microprocessors and Microsystems 39 (8), 869-878, 2015
92015
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers
Y Huang, A Kapoor, R Rutten, JP de Gyvez
Microprocessors and Microsystems 39 (8), 869-878, 2015
92015
Massive MIMO processing at the semiconductor edge: Exploiting the system and circuit margins for power savings
Y Huang, C Desset, A Bourdoux, W Dehaene, L Van der Perre
2017 IEEE International Conference on Acoustics, Speech and Signal …, 2017
72017
< 30 mW rectangular-to-polar conversion processor in 802.11 ad polar transmitter
C Li, A Bourdoux, M Verhelst, Y Huang, M Li, L Van Der Perre, S Pollin
2015 IEEE International Conference on Acoustics, Speech and Signal …, 2015
72015
Computation-skip error resilient scheme for recursive CORDIC
Y Huang, M Li, C Li, P Debacker, L Van der Perre
2014 IEEE workshop on signal processing systems (SiPS), 1-6, 2014
52014
Error resilient digital signal processing device
Y Huang, LI Chunshu, M Li
US Patent 10,372,868, 2019
42019
A 28 nm CMOS 7.04 Gsps polar digital front-end processor for 60 GHz transmitter
Y Huang, C Li, K Khalaf, A Bourdoux, J Verschueren, Q Shi, P Wambacq, ...
2016 IEEE Asian solid-state circuits conference (A-SSCC), 333-336, 2016
42016
Lousy processing increases energy efficiency in massive MIMO systems
S Gunnarsson, M Bortas, Y Huang, CM Chen, L Van der Perre, O Edfors
2017 European Conference on Networks and Communications (EuCNC), 1-5, 2017
32017
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain using Carry-Save format numbers
Y Huang, A Kapoor, R Rutten, JP de Gyvez
31th Norchip Conference, 2013, 1-4, 2013
32013
Partial Computation-skip Scheme for Power Supply Voltage Scaling
Y Huang, M Li, C Li, L Van der Perre
1st Workshop On Approximate Computing, HiPEAC (WAPCO), 2015
22015
A 100 Gbps LDPC Decoder for the IEEE 802.11 ay Standard
M Li, V Derudder, C Desset, A Dewilde, A Bourdoux, Y Huang
2018 IEEE 10th International Symposium on Turbo Codes & Iterative …, 2018
12018
Digital Frontend System for a Radio Transmitter and a Method Thereof
LI Chunshu, Y Huang, A Bourdoux, I Vzw, KU Leuven, R D
US Patent App. 15/097,805, 2016
12016
Energy-efficient digital front-end processor for 60 GHz polar transmitter
C Li, Y Huang, K Khalaf, A Bourdoux, M Verhelst, L Van Der Perre, ...
Journal of Signal Processing Systems, 1-13, 2016
12016
Implementation Studies of Multi-rate Systems
Y Huang, C Li
Advances in Multirate Systems, 1-33, 2018
2018
Cross-Layer Optimization for Power-Efficient and Robust Digital Circuits and Systems
Y Huang
arXiv preprint arXiv:1712.03948, 2017
2017
Massive MIMO Systems Can Deliver Great Performance with Coarsely Quantized Signals
SEL Gunnarsson, M Bortas, Y Huang, C Cheng-Ming, CM Chen, ...
Proceedings of the 2017 Symposium on Information Theory and Signal …, 2017
2017
Fine-grained hardware switching scheme for power reduction in multiplication
Y Huang, C Li, M Li, LV der Perre, W Dehaene
Electronics Letters 52 (16), 1374-1375, 2016
2016
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Articles 1–20