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Teruo Tanimoto
Teruo Tanimoto
Faculty of Information Science and Electrical Engineering, Kyushu University, Japan
Verified email at m.kyushu-u.ac.jp - Homepage
Title
Cited by
Cited by
Year
Scalability-based manycore partitioning
H Sasaki, T Tanimoto, K Inoue, H Nakamura
Proceedings of the 21st international conference on Parallel architectures …, 2012
522012
SuperNPU: An extremely fast neural processing unit using superconducting logic devices
K Ishida, I Byun, I Nagaoka, K Fukumitsu, M Tanaka, S Kawakami, ...
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020
242020
32 GHz 6.5 mW gate-level-pipelined 4-bit processor using superconductor single-flux-quantum logic
K Ishida, M Tanaka, I Nagaoka, T Ono, S Kawakami, T Tanimoto, ...
2020 IEEE Symposium on VLSI Circuits, 1-2, 2020
222020
Arithmetic processing apparatus, information processing apparatus, and control method of arithmetic processing apparatus
T Tanimoto
US Patent App. 14/576,918, 2015
132015
Information processing apparatus, input and output control device, and method of controlling information processing apparatus
T Tanimoto
US Patent 9,753,872, 2017
112017
Superconductor computing for neural networks
K Ishida, I Byun, I Nagaoka, K Fukumitsu, M Tanaka, S Kawakami, ...
IEEE Micro 41 (03), 19-26, 2021
102021
Enhanced dependence graph model for critical path analysis on modern out-of-order processors
T Tanimoto, T Ono, K Inoue, H Sasaki
IEEE Computer Architecture Letters 16 (2), 111-114, 2017
82017
Dependence graph model for accurate critical path analysis on out-of-order processors
T Tanimoto, T Ono, K Inoue
Journal of Information Processing 25, 983-992, 2017
62017
FlexDAS: A flexible direct attached storage for I/O intensive applications
T Ono, Y Konishi, T Tanimoto, N Iwamatsu, T Miyoshi, J Tanaka
2014 IEEE international conference on big data (big data), 147-152, 2014
52014
Why do programs have heavy tails?
H Sasaki, FH Su, T Tanimoto, S Sethumadhavan
2017 IEEE International Symposium on Workload Characterization (IISWC), 135-145, 2017
42017
A flexible direct attached storage for a data intensive application
T Ono, Y Konishi, T Tanimoto, N Iwamatsu, T Miyoshi, J Tanaka
IEICE TRANSACTIONS on Information and Systems 98 (12), 2168-2177, 2015
32015
System, information processing device, and method
T Tanimoto, T Miyoshi
US Patent App. 15/139,954, 2016
22016
Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays
Y Suzuki, T Sugiyama, T Arai, W Liao, K Inoue, T Tanimoto
2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2022
12022
How many trials do we need for reliable NISQ computing?
T Tanimoto, S Matsuo, S Kawakami, Y Tabuchi, M Hirokawa, K Inoue
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 288-290, 2020
12020
Practical error modeling toward realistic NISQ simulation
T Tanimoto, S Matsuo, S Kawakami, Y Tabuchi, M Hirokawa, K Inoue
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 291-293, 2020
12020
高位合成用 DSL コンパイラを用いたコーナー検出処理のハードウェア実装
原凌司, 井上優良, 谷本輝夫, 大澤隆志, 丸岡晃, 飯塚拓郎, 井上弘士
研究報告システム・アーキテクチャ (ARC) 2018 (11), 1-8, 2018
12018
CPCI stack: Metric for accurate bottleneck analysis on OoO microprocessors
T Tanimoto, T Ono, K Inoue
2017 Fifth International Symposium on Computing and Networking (CANDAR), 166-172, 2017
12017
Heavy tails in program structure
H Sasaki, FH Su, T Tanimoto, S Sethumadhavan
IEEE Computer Architecture Letters 16 (1), 34-37, 2016
12016
ディスクエリアネットワークを用いたフラッシュストレージの性能改善手法
小野貴継, 谷本輝夫, 三吉貴史
電子情報通信学会技術研究報告; 信学技報 113 (169), 7-12, 2013
12013
ディスクエリアネットワークを用いたフラッシュストレージの性能改善手法の検討
小野貴継, 谷本輝夫, 三吉貴史, 堀江健志
電子情報通信学会技術研究報告; 信学技報 112 (237), 79-84, 2012
12012
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