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Jude Angelo Ambrose
Jude Angelo Ambrose
Postdoctoral Research Associate of School of Computer Science and Engineering, University of New South Wales, Australia
Geverifieerd e-mailadres voor cse.unsw.edu.au - Homepage
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RIJID: Random code injection to mask power analysis based side channel attacks
JA Ambrose, RG Ragel, S Parameswaran
Proceedings of the 44th annual Design Automation Conference, 489-492, 2007
822007
MUTE-AES: A multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm
JA Ambrose, S Parameswaran, A Ignjatovic
2008 IEEE/ACM International Conference on Computer-Aided Design, 678-684, 2008
582008
Design and implementation of an operating system for composable processor sharing
A Hansson, M Ekerhult, A Molnos, A Milutinovic, A Nelson, J Ambrose, ...
Microprocessors and Microsystems 35 (2), 246-260, 2011
482011
Advanced modes in AES: Are they safe from power analysis based side channel attacks?
D Jayasinghe, R Ragel, JA Ambrose, A Ignjatovic, S Parameswaran
2014 IEEE 32nd International Conference on Computer Design (ICCD), 173-180, 2014
352014
A smart random code injection to mask power analysis based side channel attacks
JA Ambrose, RG Ragel, S Parameswaran
2007 5th IEEE/ACM/IFIP International Conference on Hardware/Software …, 2007
312007
Multiprocessor information concealment architecture to prevent power analysis-based side channel attacks
JA Ambrose, RG Ragel, S Parameswaran, A Ignjatovic
IET computers & digital techniques 5 (1), 1-15, 2011
302011
Processor design for soft errors: Challenges and state of the art
T Li, JA Ambrose, R Ragel, S Parameswaran
ACM Computing Surveys (CSUR) 49 (3), 1-44, 2016
292016
RASTER: Runtime adaptive spatial/temporal error resiliency for embedded processors
T Li, M Shafique, JA Ambrose, S Rehman, J Henkel, S Parameswaran
Proceedings of the 50th Annual Design Automation Conference, 1-7, 2013
272013
A composable, energy-managed, real-time MPSoC platform
A Molnos, JA Ambrose, A Nelson, R Stefan, S Cotofana, K Goossens
2010 12th International Conference on Optimization of Electrical and …, 2010
262010
Power analysis side channel attacks: The processor design-level context
JA Ambrose, A Ignjatovic, S Parameswaran
VDM Publishing, 2010
232010
DHASER: dynamic heterogeneous adaptation for soft-error resiliency in ASIP-based multi-core systems
T Li, M Shafique, S Rehman, JA Ambrose, J Henkel, S Parameswaran
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 646-653, 2013
192013
Randomized instruction injection to counter power analysis attacks
JA Ambrose, RG Ragel, S Parameswaran
ACM Transactions on Embedded Computing Systems (TECS) 11 (3), 1-28, 2012
182012
Overview and investigation of SEU detection and recovery approaches for FPGA-based heterogeneous systems
E Cetin, O Diessel, T Li, JA Ambrose, T Fisk, S Parameswaran, ...
FPGAs and parallel architectures for aerospace applications, 33-46, 2016
172016
Quadseal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks
D Jayasinghe, A Ignjatovic, JA Ambrose, R Ragel, S Parameswaran
2015 International Conference on Compilers, Architecture and Synthesis for …, 2015
162015
Improving ga-based noc mapping algorithms using a formal model
VA Palaniveloo, JA Ambrose, A Sowmya
2014 IEEE Computer Society Annual Symposium on VLSI, 344-349, 2014
162014
A double-width algorithmic balancing to prevent power analysis side channel attacks in aes
A Arora, JA Ambrose, J Peddersen, S Parameswaran
2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 76-83, 2013
152013
Anatomy of differential power analysis for AES
JA Ambrose, N Aldon, A Ignjatovic, S Parameswaran
2008 10th International Symposium on Symbolic and Numeric Algorithms for …, 2008
142008
Side channel attacks in embedded systems: A tale of hostilities and deterrence
JA Ambrose, RG Ragel, D Jayasinghe, T Li, S Parameswaran
Sixteenth International Symposium on Quality Electronic Design, 452-459, 2015
132015
Fine-grained checkpoint recovery for application-specific instruction-set processors
T Li, M Shafique, JA Ambrose, J Henkel, S Parameswaran
IEEE Transactions on Computers 66 (4), 647-660, 2016
122016
CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors
T Li, M Shafique, S Rehman, S Radhakrishnan, R Ragel, JA Ambrose, ...
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 707-712, 2013
122013
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Artikelen 1–20