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Cory Weber
Cory Weber
Verified email at intel.com
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A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors
C Auth, C Allen, A Blattner, D Bergstrom, M Brazier, M Bost, M Buehler, ...
2012 symposium on VLSI technology (VLSIT), 131-132, 2012
9982012
A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1/spl mu/m/sup 2/SRAM cell
S Thompson, N Anand, M Armstrong, C Auth, B Arcot, M Alavi, P Bai, ...
Digest. International Electron Devices Meeting,, 61-64, 2002
4522002
A 65nm logic technology featuring 35nm gate lengths, enhanced channel strain, 8 Cu interconnect layers, low-k ILD and 0.57/spl mu/m/sup 2/SRAM cell
P Bai, C Auth, S Balakrishnan, M Bost, R Brain, V Chikarmane, ...
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004
3832004
High performance 32nm logic technology featuring 2nd generation high-k + metal gate transistors
P Packan, S Akbar, M Armstrong, D Bergstrom, M Brazier, H Deshpande, ...
2009 IEEE international electron devices meeting (IEDM), 1-4, 2009
2872009
A 32nm logic technology featuring 2nd-generation high-k + metal-gate transistors, enhanced channel strain and 0.171μm2SRAM cell size in a 291Mb array
S Natarajan, M Armstrong, M Bost, R Brain, M Brazier, CH Chang, ...
2008 IEEE International Electron Devices Meeting, 1-3, 2008
2862008
Indium-boron dual halo MOSFET
CE Weber, G Schrom, IR Post, MA Stettler
US Patent 7,226,843, 2007
1402007
Indium-boron dual halo MOSFET
CE Weber, G Schrom, IR Post, MA Stettler
US Patent 7,226,843, 2007
1402007
The tunneling field effect transistor (TFET) as an add-on for ultra-low-voltage analog and digital processes
T Nirschl, PF Wang, C Weber, J Sedlmeir, R Heinrich, R Kakoschke, ...
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004
1102004
Scaling properties of the tunneling field effect transistor (TFET): Device and circuit
T Nirschl, J Fischer, M Fulde, A Bargagli-Stoffi, M Sterkel, J Sedlmeir, ...
Solid-state electronics 50 (1), 44-51, 2006
1032006
IEDM Tech. Dig.
S Thompson, N Anand, M Armstrong, C Auth, B Arcot, M Alavi, P Bai, ...
IEDM Tech. Dig, 61, 2002
992002
High performance Hi-K+ metal gate strain enhanced transistors on (110) silicon
P Packan, S Cea, H Deshpande, T Ghani, M Giles, O Golonzka, ...
2008 IEEE International Electron Devices Meeting, 1-4, 2008
842008
An amorphous silicon thin film transistor fabricated at 125 C by dc reactive magnetron sputtering
CS McCormick, CE Weber, JR Abelson, SM Gates
Applied physics letters 70 (2), 226-227, 1997
691997
Understanding stress enhanced performance in Intel 90nm CMOS technology
MD Giles, M Armstrong, C Auth, SM Cea, T Ghani, T Hoffmann, R Kotlyar, ...
Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004., 118-119, 2004
662004
Effects of surface orientation on the performance of idealized III–V thin-body ballistic n-MOSFETs
R Kim, T Rakshit, R Kotlyar, S Hasan, CE Weber
IEEE electron device letters 32 (6), 746-748, 2011
542011
Drive current enhancement in p-type metal–oxide–semiconductor field-effect transistors under shear uniaxial stress
L Shifren, X Wang, P Matagne, B Obradovic, C Auth, S Cea, T Ghani, J He, ...
Applied physics letters 85 (25), 6188-6190, 2004
482004
Nanowire structures having wrap-around contacts
SM Cea, CE Weber, PH Keys, S Kim, MG Haverty, S Shankar
US Patent 10,483,385, 2019
472019
Resistance reduction in transistors having epitaxially grown source/drain regions
R Mehandru, AS Murthy, T Ghani, GA Glass, K Jambunathan, ST Ma, ...
US Patent App. 15/575,008, 2018
462018
Low temperature fabrication of amorphous silicon thin film transistors by dc reactive magnetron sputtering
CS McCormick, CE Weber, JR Abelson, GA Davis, RE Weiss, V Aebi
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 15 (5 …, 1997
421997
Front end stress modeling for advanced logic technologies
SM Cea, M Armstrong, C Auth, T Ghani, MD Giles, T Hoffmann, R Kotlyar, ...
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004
402004
IEDM Tech. Dig.
S Natarajan, M Armstrong, M Bost, R Brain, M Brazier, CH Chang
IEDM Tech. Dig 3, 1-3.7, 2008
392008
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