| Parameter variation tolerance and error resiliency: New design paradigm for the nanoscale era S Ghosh, K Roy Proceedings of the IEEE 98 (10), 1718-1751, 2010 | 238 | 2010 |
| Emerging trends in design and applications of memory-based computing and content-addressable memories R Karam, R Puri, S Ghosh, S Bhunia Proceedings of the IEEE 103 (8), 1311-1330, 2015 | 207 | 2015 |
| CRISTA: A new paradigm for low-power, variation-tolerant, and adaptive circuit synthesis using critical path isolation S Ghosh, S Bhunia, K Roy IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007 | 153* | 2007 |
| The hardware trojan war S Bhunia, M Tehranipoor Cham,, Switzerland: Springer, 2018 | 145 | 2018 |
| How secure are printed circuit boards against trojan attacks? S Ghosh, A Basak, S Bhunia IEEE Design & Test 32 (2), 7-16, 2014 | 95 | 2014 |
| QURE: Qubit re-allocation in noisy intermediate-scale quantum computers A Ash-Saki, M Alam, S Ghosh Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 92 | 2019 |
| Circuit compilation methodologies for quantum approximate optimization algorithm M Alam, A Ash-Saki, S Ghosh 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 82 | 2020 |
| MUQUT: Multi-constraint quantum circuit mapping on NISQ computers D Bhattacharjee, AA Saki, M Alam, A Chattopadhyay, S Ghosh 2019 IEEE/ACM international conference on computer-aided design (ICCAD), 1-7, 2019 | 81* | 2019 |
| Quantum generative models for small molecule drug discovery J Li, RO Topaloglu, S Ghosh IEEE transactions on quantum engineering 2, 1-8, 2021 | 76 | 2021 |
| Low-power Variation-tolerant Design in Nanometer Silicon S Bhunia Springer Verlag, 2010 | 75 | 2010 |
| Voltage scalable high-speed robust hybrid arithmetic units using adaptive clocking S Ghosh, D Mohapatra, G Karakonstantis, K Roy IEEE transactions on very large scale integration (VLSI) systems 18 (9 …, 2009 | 75 | 2009 |
| Spintronics and security: Prospects, vulnerabilities, attack models, and preventions S Ghosh Proceedings of the IEEE 104 (10), 1864-1893, 2016 | 72 | 2016 |
| 13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology F Hamzaoglu, U Arslan, N Bisnik, S Ghosh, MB Lal, N Lindert, ... 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 69 | 2014 |
| Impact of process-variations in STTRAM and adaptive boosting for robustness S Motaman, S Ghosh, N Rathi 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 60 | 2015 |
| Quantum puf for security and trust in quantum computing K Phalak, A Ash-Saki, M Alam, RO Topaloglu, S Ghosh IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (2 …, 2021 | 59 | 2021 |
| Analysis of quantum approximate optimization algorithm under realistic noise in superconducting qubits M Alam, A Ash-Saki, S Ghosh arXiv preprint arXiv:1907.09631, 2019 | 55 | 2019 |
| Analysis of crosstalk in nisq devices and security implications in multi-programming regime A Ash-Saki, M Alam, S Ghosh Proceedings of the ACM/IEEE International Symposium on Low Power Electronics …, 2020 | 54 | 2020 |
| Sensitivity based error resilient techniques for energy efficient deep neural network accelerators W Choi, D Shin, J Park, S Ghosh Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 54 | 2019 |
| A novel on-chip delay measurement hardware for efficient speed-binning A Raychowdhury, S Ghosh, K Roy 11th IEEE International On-Line Testing Symposium, 287-292, 2005 | 54 | 2005 |
| Accelerating quantum approximate optimization algorithm using machine learning M Alam, A Ash-Saki, S Ghosh 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 686-689, 2020 | 52 | 2020 |
Abdullah Ash SakiResearcher @ IBM QuantumVerified email at ibm.com
