Equivalent circuit model for power bus design in multi-layer PCBs with via arrays J Kim, K Shringarpure, J Fan, J Kim, JL Drewniak IEEE Microwave and Wireless Components Letters 21 (2), 62-64, 2011 | 57 | 2011 |
Formulation and network model reduction for analysis of the power distribution network in a production-level multilayered printed circuit board K Shringarpure, S Pan, J Kim, J Fan, B Achkir, B Archambeault, ... IEEE Transactions on Electromagnetic Compatibility 58 (3), 849-858, 2016 | 45* | 2016 |
Analytical expressions for transfer function of supply voltage fluctuation to jitter at a single-ended buffer J Kim, S De, K Shringarpure, S Pan, B Achkir, J Fan, JL Drewniak 2011 IEEE International Symposium on Electromagnetic Compatibility, 422-427, 2011 | 32 | 2011 |
Plane-pair PEEC model for power distribution networks with sub-meshing techniques L Wei, L Li, K Shringarpure, AE Ruehli, E Wheeler, J Fan, B Archambeault, ... IEEE Transactions on Microwave Theory and Techniques 64 (3), 733-741, 2016 | 29 | 2016 |
Characterization of PCB dielectric properties using two striplines on the same board L Hua, B Chen, S Jin, M Koledintseva, J Lim, K Qiu, R Brooks, J Zhang, ... 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC …, 2014 | 29 | 2014 |
Analytical PDN voltage ripple calculation using simplified equivalent circuit model of PCB PDN B Zhao, C Huang, K Shringarpure, J Fan, B Archambeault, B Achkir, ... 2015 IEEE Symposium on Electromagnetic Compatibility and Signal Integrity …, 2015 | 26 | 2015 |
On finding the optimal number of decoupling capacitors by minimizing the equivalent inductance of the PCB PDN K Shringarpure, B Zhao, L Wei, B Archambeault, A Ruehli, M Cracraft, ... 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC …, 2014 | 25 | 2014 |
Sensitivity analysis of a circuit model for power distribution network in a multilayered printed circuit board K Shringarpure, S Pan, J Kim, J Fan, B Achkir, B Archambeault, ... IEEE Transactions on Electromagnetic Compatibility 59 (6), 1993-2001, 2017 | 17 | 2017 |
Plane-pair PEEC models for PDN using sub-meshing L Wei, K Shringarpure, A Ruehli, E Wheeler, J Drewniak 2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging …, 2014 | 12 | 2014 |
De-embedding techniques for transmission lines: An exploration, review, and proposal N Erickson, K Shringarpure, J Fan, B Achkir, S Pan, C Hwang 2013 IEEE International Symposium on Electromagnetic Compatibility, 840-845, 2013 | 11 | 2013 |
Fully analytical methodology for fast end-to-end link analysis on complex printed circuit boards including signal and power integrity effects X Gu, F De Paulis, R Rimolo-Donadio, K Shringarpure, Y Zhang, ... Proc. IEC DesignCon Conference, 2-5, 2009 | 11 | 2009 |
Transient simulation for power integrity using physics based circuit modeling B Zhao, C Huang, K Shringarpure, S Bai, T Makharashvili, YS Cao, ... 2016 Asia-Pacific International Symposium on Electromagnetic Compatibility …, 2016 | 10 | 2016 |
Innovative PDN design guidelines for practical high layer-count PCBs K Shringarpure, S Pan, J Kim, B Achkir, B Archambeault, J Fan, ... UBM Electronics 2, 1290, 2013 | 10 | 2013 |
Power integrity with voltage ripple spectrum decomposition for physics-based design C Huang, B Zhao, K Shringarpure, S Bai, X Fang, T Makharashvili, H Ye, ... 2016 IEEE International Symposium on Electromagnetic Compatibility (EMC …, 2016 | 9 | 2016 |
Effectiveness analysis of de-embedding method for typical TSV pairs in a silicon interposer Q Wang, K Shringarpure, B Chen, J Fan, C Hwang, S Pan, B Achkir 2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging …, 2014 | 9 | 2014 |
Effect of narrow power fills on PCB PDN noise K Shringarpure, B Zhao, B Archambeault, A Ruehli, J Fan, J Drewniak 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC …, 2014 | 9 | 2014 |
The study of a model for via transition and the multi-layer via transition tool GUI design K Shringarpure Missouri University of Science and Technology, 2010 | 6 | 2010 |
Designing test patterns for effective measurement of typical TSV pairs in a silicon interposer Q Wang, K Shringarpure, J Fan, C Hwang, S Pan, B Achkir 2014 International Symposium on Electromagnetic Compatibility, Tokyo, 382-385, 2014 | 5 | 2014 |
Printed circuit board power distribution network modeling, analysis and design, and, statistical crosstalk analysis for high speed digital links K Shringarpure Missouri University of Science and Technology, 2015 | 3 | 2015 |
IC-based Antenna Switch Modeling and Robustness Evaluation for SEED Applications SM Mousavi, G Fellner, D Pommerenke, S Chandra, K Shringarpure, ... 2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium, 1012-1017, 2021 | 1 | 2021 |