Ronald Knepper
Ronald Knepper
Professor ECE, Boston University
Verified email at bu.edu
Title
Cited by
Cited by
Year
Chip substrate resistance modeling technique for integrated circuit design
TA Johnson, RW Knepper, V Marcello, W Wang
IEEE transactions on computer-aided design of integrated circuits and …, 1984
1131984
Method for controlling interfacial oxide at a polycrystalline/monocrystalline silicon interface
RK Cook, RW Knepper, SK Kulkarni, RC Lange, PA Ronsheim, ...
US Patent 5,194,397, 1993
641993
Enhancement/depletion mode field effect transistor driver
RW Knepper
US Patent 4,071,783, 1978
421978
Method for forming a narrow channel length MOS field effect transistor
WS Johnson, RW Knepper
US Patent 4,078,947, 1978
411978
Advanced bipolar transistor modeling: Process and device simulation tools for today's technology
RW Knepper, SP Gaur, FY Chang, GR Srinivasan
IBM journal of research and development 29 (3), 218-228, 1985
291985
Two-dimensional process modeling: A description of the SAFEPRO program
RR O'Brien, CM Hsieh, JS Moore, RF Lever, PC Murley, KW Brannon, ...
IBM journal of research and development 29 (3), 229-241, 1985
251985
Semiconductor device having electrically insulating barriers for surface leakage sensitive devices and method of forming
SA Abbas, CS Chang, LB Freeman Jr, RW Knepper
US Patent 3,961,355, 1976
241976
High speed DRAM local bit line sense amplifier
RH Dennard, RW Knepper
US Patent 6,426,905, 2002
232002
A low-noise, wideband preamplifier for a Fourier-transform ion cyclotron resonance mass spectrometer
R Mathur, RW Knepper, PB O’Connor
Journal of the American Society for Mass Spectrometry 18 (12), 2233-2241, 2007
222007
Read only memory including an isolation network connected between the array of memory cells and the output sense amplifier whereby reading speed is enhanced
RD Kimmel, RW Knepper, R Levi
US Patent 4,651,302, 1987
191987
A 45 GHz strained-layer SiGe heterojunction bipolar transister fabricated with low temperature epitaxy
SE Fischer, RK Cook, RW Knepper, RC Lange, K Nummy, DC Ahlgren, ...
International Technical Digest on Electron Devices Meeting, 890-892, 1989
181989
Dynamic depletion mode: An E/D mosfet circuit method for improved performance
RW Knepper
IEEE Journal of Solid-State Circuits 13 (5), 542-548, 1978
181978
A 300-V LDMOS analog-multiplexed driver for MEMS devices
S Dai, RW Knepper, MN Horenstein
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (12), 2806-2816, 2015
142015
Vertical-gate CMOS compatible lateral bipolar transistor
CM Hsieh, LLG Hsu, SN Mei, RW Knepper, LF Wagner Jr
US Patent 5,446,312, 1995
121995
Method of forming a novel vertical-gate CMOS compatible lateral bipolar transistor
CM Hsieh, LLG Hsu, SN Mei, RW Knepper, LF Wagner Jr
US Patent 5,371,022, 1994
111994
Differential Sensing of Substrate Noise in Mixed-Signal 0.18-BiCMOS Technology
H Dai, RW Knepper
IEEE electron device letters 29 (8), 898-901, 2008
102008
Narrow channel length MOS field effect transistor with field protection region for reduced source-to-substrate capacitance
WS Johnson, RW Knepper
US Patent 4,350,991, 1982
101982
Field effect transistor (FET) circuit utilizing substrate potential for turning off depletion mode devices
RW Knepper
US Patent 4,093,875, 1978
101978
Modeling and Experimental Measurement of Active Substrate-Noise Suppression in Mixed-Signal 0.18- BiCMOS Technology
H Dai, RW Knepper
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
92009
Memory array with switchable upper and lower word lines
RW Knepper
US Patent 4,460,984, 1984
91984
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