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Sudipta Kundu
Sudipta Kundu
Principal R&D Engineer at Synopsys Inc.
Verified email at synopsys.com
Title
Cited by
Cited by
Year
Proving optimizations correct using parameterized program equivalence
S Kundu, Z Tatlock, S Lerner
ACM Sigplan Notices 44 (6), 327-337, 2009
1522009
Symbolic predictive analysis for concurrent programs
C Wang, S Kundu, M Ganai, A Gupta
International Symposium on Formal Methods, 256-272, 2009
1062009
Validating high-level synthesis
S Kundu, S Lerner, R Gupta
Computer Aided Verification: 20th International Conference, CAV 2008 …, 2008
672008
Translation validation of high-level synthesis
S Kundu, S Lerner, RK Gupta
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
612010
Partial order reduction for scalable testing of SystemC TLM designs
S Kundu, M Ganai, R Gupta
Proceedings of the 45th Annual Design Automation Conference, 936-941, 2008
542008
Automated refinement checking of concurrent systems
S Kundu, S Lerner, R Gupta
2007 IEEE/ACM International Conference on Computer-Aided Design, 318-325, 2007
252007
Symbolic predictive analysis for concurrent programs
C Wang, S Kundu, R Limaye, M Ganai, A Gupta
Formal aspects of computing 23, 781-805, 2011
202011
Contessa: Concurrency Testing Augmented with Symbolic Analysis
S Kundu, MK Ganai, C Wang
Computer Aided Verification: 22nd International Conference, CAV 2010 …, 2010
192010
Partial order reduction for scalable testing in system level design
MK Ganai, S Kundu
US Patent App. 12/265,347, 2009
192009
High-level Verification: Methods and Tools for Verification of System-level Designs
S Kundu, S Lerner, R Gupta
Springer Verlag, 2011
15*2011
Methods and systems for reducing verification conditions for concurrent programs using mutually atomic transactions
MK Ganai, S Kundu
US Patent 8,448,145, 2013
102013
Reduction of verification conditions for concurrent system using mutually atomic transactions
MK Ganai, S Kundu
International SPIN Workshop on Model Checking of Software, 68-87, 2009
92009
High-Level Verification
S Kundu, S Lerner, R Gupta
IPSJ Transactions on System and LSI Design Methodology 2, 131-144, 2009
62009
Population analysis with Wannier orbitals
S Kundu, S Bhattacharjee, SC Lee, M Jain
The Journal of Chemical Physics 154 (10), 2021
42021
Equivalence checking using structural analysis on data flow graphs
S Kundu, CP Pixley
US Patent 8,914,758, 2014
42014
Exciton fine structure in twisted transition metal dichalcogenide heterostructures
S Kundu, T Amit, HR Krishnamurthy, M Jain, S Refaely-Abramson
npj Computational Materials 9 (1), 186, 2023
32023
Translation Validation of High-Level Synthesis
S Kundu, S Lerner, RK Gupta, S Kundu, S Lerner, RK Gupta
High-Level Verification: Methods and Tools for Verification of System-Level …, 2011
32011
OaSis: an application specific operating system for an embedded environment
GS Brar, S Kundu, P Worah, S Biswas, A Mukhopadhyay, A Basu
17th International Conference on VLSI Design. Proceedings., 776-779, 2004
32004
Flat bands in twisted bilayer WSe with strong spin-orbit interaction
S Kundu, MH Naik, HR Krishnamurthy, M Jain
arXiv e-prints, arXiv: 2103.07447, 2021
22021
Deep insight for debug using internal equivalence visualization and counter-example for sequential equivalence checking
S Kundu, P Bjesse
US Patent 10,515,170, 2019
22019
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