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Daniele Baldi
Daniele Baldi
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A low-noise design technique for high-speed CMOS optical receivers
D Li, G Minoia, M Repossi, D Baldi, E Temporiti, A Mazzanti, F Svelto
IEEE Journal of Solid-State Circuits 49 (6), 1437-1447, 2014
1492014
A 3 GHz fractional all-digital PLL with a 1.8 MHz bandwidth implementing spur reduction techniques
E Temporiti, C Weltin-Wu, D Baldi, R Tonietto, F Svelto
IEEE Journal of Solid-State Circuits 44 (3), 824-834, 2009
1372009
A 3.5 GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensation
E Temporiti, C Weltin-Wu, D Baldi, M Cusmai, F Svelto
IEEE Journal of Solid-State Circuits 45 (12), 2723-2736, 2010
1152010
A multi-standard 1.5 to 10 Gb/s latch-based 3-tap DFE receiver with a SSC tolerant CDR for serial backplane communication
M Pozzoni, S Erba, P Viola, M Pisati, E Depaoli, D Sanzogni, R Brama, ...
IEEE journal of solid-state circuits 44 (4), 1306-1315, 2009
692009
22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s
M Cignoli, G Minoia, M Repossi, D Baldi, A Ghilioni, E Temporiti, F Svelto
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
602015
A 3GHz fractional-N all-digital PLL with precise time-to-digital converter calibration and mismatch correction
C Weltin-Wu, E Temporiti, D Baldi, F Svelto
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
602008
23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies
E Temporiti, G Minoia, M Repossi, D Baldi, A Ghilioni, F Svelto
2016 IEEE International Solid-State Circuits Conference (ISSCC), 404-405, 2016
512016
Insights into silicon photonics Mach–Zehnder-based optical transmitter architectures
E Temporiti, A Ghilioni, G Minoia, P Orlandi, M Repossi, D Baldi, F Svelto
IEEE Journal of Solid-State Circuits 51 (12), 3178-3191, 2016
502016
A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies
E Temporiti, G Minoia, M Repossi, D Baldi, A Ghilioni, F Svelto
ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 131-134, 2014
382014
A 3.5 GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensation
C Weltin-Wu, E Temporiti, D Baldi, M Cusmai, F Svelto
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 468-469, 2010
282010
12.2 A 4-channel 200Gb/s PAM-4 BiCMOS transceiver with silicon photonics front-ends for gigabit Ethernet applications
E Sentieri, T Copani, A Paganini, M Traldi, A Palladino, A Santipo, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 210-212, 2020
252020
Method of improving noise characteristics of an ADPLL and a relative ADPLL
C Weltin-wu, EST Milani, D Baldi
US Patent 7,940,099, 2011
182011
A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization
M Pozzoni, S Erba, D Sanzogni, M Ganzerli, P Viola, D Baldi, M Repossi, ...
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 164-165, 2010
152010
Insights into wideband fractional ADPLLs: Modeling and calibration of nonlinearity induced fractional spurs
C Weltin-Wu, E Temporiti, M Cusmai, D Baldi, F Svelto
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (9), 2259-2268, 2010
142010
Insights into wideband fractional all-digital PLLs for RF applications
E Temporiti, C Weltin-Wu, D Baldi, R Tonietto, F Svelto
2009 IEEE Custom Integrated Circuits Conference, 37-44, 2009
132009
Transmitter made up of a silicon photonic IC and its flip-chipped CMOS IC driver targeting implementation in FDMA-PON
S Menezo, E Temporiti, J Lee, O Dubray, M Fournier, S Bernabé, D Baldi, ...
Journal of Lightwave Technology 34 (10), 2391-2397, 2016
122016
A 5thorder gm-C low-pass filter with ±3% cut-off frequency accuracy and 220MHz to 3.3GHz tuning-range in 28nm LP CMOS
N Sabatino, G Minoia, M Roche, D Baldi, E Temporiti, A Mazzanti
ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 351-354, 2014
122014
Demonstration of a partially integrated silicon photonics ONU in a self-coherent reflective FDMA PON
S Straullu, P Savio, G Franco, R Gaudino, V Ferrero, S Bernabé, ...
Journal of Lightwave Technology 35 (7), 1307-1312, 2017
102017
A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links
D Li, G Minoia, M Repossi, D Baldi, A Ghilioni, E Temporiti, F Svelto
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2334-2337, 2016
102016
Multi-rate low-noise optical receiver front-end
D Li, G Minoia, M Repossi, D Baldi, E Temporiti, A Ghilioni, F Svelto
Journal of Lightwave Technology 38 (18), 4978-4986, 2020
72020
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