| Electromechanical piezoresistive sensing in suspended graphene membranes AD Smith, F Niklaus, A Paussa, S Vaziri, AC Fischer, M Sterner, ... Nano letters 13 (7), 3237-3242, 2013 | 439 | 2013 |
| Nanoscale MOS transistors: semi-classical transport and applications D Esseni, P Palestri, L Selmi Cambridge University Press, 2011 | 275 | 2011 |
| Inverters with strained Si nanowire complementary tunnel field-effect transistors L Knoll, QT Zhao, A Nichau, S Trellenkamp, S Richter, A Schäfer, ... IEEE electron device letters 34 (6), 813-815, 2013 | 225 | 2013 |
| Physically based modeling of low field electron mobility in ultrathin single-and double-gate SOI n-MOSFETs D Esseni, A Abramo, L Selmi, E Sangiorgi IEEE transactions on electron devices 50 (12), 2445-2455, 2003 | 203 | 2003 |
| Understanding quasi-ballistic transport in nano-MOSFETs: part I-scattering in the channel and in the drain P Palestri, D Esseni, S Eminente, C Fiegna, E Sangiorgi, L Selmi IEEE Transactions on Electron Devices 52 (12), 2727-2735, 2005 | 190 | 2005 |
| Two-dimensional heterojunction interlayer tunneling field effect transistors (thin-TFETs) MO Li, D Esseni, JJ Nahas, D Jena, HG Xing IEEE Journal of the Electron Devices Society 3 (3), 200-207, 2015 | 161 | 2015 |
| Modeling of electron mobility degradation by remote Coulomb scattering in ultrathin oxide MOSFETs D Esseni, A Abramo IEEE Transactions on Electron Devices 50 (7), 1665-1674, 2003 | 155 | 2003 |
| Piezoresistive properties of suspended graphene membranes under uniaxial and biaxial strain in nanoelectromechanical pressure sensors AD Smith, F Niklaus, A Paussa, S Schröder, AC Fischer, M Sterner, ... ACS nano 10 (11), 9879-9886, 2016 | 150 | 2016 |
| Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application D Esseni, M Mastrapasqua, GK Celler, C Fiegna, L Selmi, E Sangiorgi IEEE Transactions on Electron Devices 48 (12), 2842-2850, 2001 | 150 | 2001 |
| Multisubband Monte Carlo study of transport, quantization, and electron-gas degeneration in ultrathin SOI n-MOSFETs L Lucci, P Palestri, D Esseni, L Bergagnini, L Selmi IEEE transactions on electron devices 54 (5), 1156-1164, 2007 | 148* | 2007 |
| Single particle transport in two-dimensional heterojunction interlayer tunneling field effect transistor MO Li, D Esseni, G Snider, D Jena, H Grace Xing Journal of Applied Physics 115 (7), 2014 | 143 | 2014 |
| An experimental study of mobility enhancement in ultrathin SOI transistors operated in double-gate mode D Esseni, M Mastrapasqua, GK Celler, C Fiegna, L Selmi, E Sangiorgi IEEE Transactions on Electron Devices 50 (3), 802-808, 2003 | 139 | 2003 |
| Universal analytic model for tunnel FET circuit simulation H Lu, D Esseni, A Seabaugh Solid-State Electronics 108, 110-117, 2015 | 137* | 2015 |
| On the modeling of surface roughness limited mobility in SOI MOSFETs and its correlation to the transistor effective field D Esseni IEEE Transactions on Electron Devices 51 (3), 394-401, 2004 | 135 | 2004 |
| Strain-induced performance improvements in InAs nanowire tunnel FETs F Conzatti, MG Pala, D Esseni, E Bano, L Selmi IEEE transactions on electron devices 59 (8), 2085-2092, 2012 | 116 | 2012 |
| Investigation of the transport properties of silicon nanowires using deterministic and Monte Carlo approaches to the solution of the Boltzmann transport equation M Lenzi, P Palestri, E Gnani, S Reggiani, A Gnudi, D Esseni, L Selmi, ... IEEE Transactions on Electron Devices 55 (8), 2086-2096, 2008 | 111 | 2008 |
| Strain-Induced Modulation of Electron Mobility in Single-Layer Transition Metal Dichalcogenides MX2(, W;, Se) M Hosseini, M Elahi, M Pourfath, D Esseni IEEE Transactions on Electron Devices 62 (10), 3192-3198, 2015 | 109 | 2015 |
| A TCAD-based methodology to model the site-binding charge at ISFET/electrolyte interfaces A Bandiziol, P Palestri, F Pittino, D Esseni, L Selmi IEEE Transactions on Electron Devices 62 (10), 3379-3386, 2015 | 108 | 2015 |
| Interface traps in InAs nanowire tunnel-FETs and MOSFETs—Part I: Model description and single trap analysis in tunnel-FETs MG Pala, D Esseni IEEE transactions on electron devices 60 (9), 2795-2801, 2013 | 107 | 2013 |
| Leakage–delay tradeoff in FinFET logic circuits: A comparative analysis with bulk technology M Agostinelli, M Alioto, D Esseni, L Selmi IEEE Transactions on very large scale integration (VLSI) systems 18 (2), 232-245, 2009 | 107 | 2009 |
pierpaolo palestriUniversity of UdineVerified email at uniud.it
