Differential power analysis model and some results S Guilley, P Hoogvorst, R Pacalet Smart Card Research and Advanced Applications VI: IFIP 18th World Computer …, 2004 | 143 | 2004 |
A UML-based environment for system design space exploration L Apvrille, W Muhammad, R Ameur-Boulifa, S Coudert, R Pacalet 2006 13th IEEE International Conference on Electronics, Circuits and Systems …, 2006 | 96 | 2006 |
Security requirements for automotive on-board networks based on dark-side scenarios A Ruddle, D Ward, B Weyl, S Idrees, Y Roudier, M Friedewald, ... EVITA Deliverable D 2 (3), 2009 | 86 | 2009 |
The “Backend Duplication” Method: A Leakage-Proof Place-and-Route Strategy for ASICs S Guilley, P Hoogvorst, Y Mathieu, R Pacalet Cryptographic Hardware and Embedded Systems–CHES 2005: 7th International …, 2005 | 85 | 2005 |
CMOS structures suitable for secured hardware S Guilley, P Hoogvorst, Y Mathieu, R Pacalet, J Provost Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 82 | 2004 |
Security evaluation of WDDL and SecLib countermeasures against power attacks S Guilley, L Sauvage, P Hoogvorst, R Pacalet, GM Bertoni, S Chaudhuri IEEE Transactions on Computers 57 (11), 1482-1497, 2008 | 67 | 2008 |
Evaluation of power constant dual-rail logics countermeasures against DPA with design time security metrics S Guilley, L Sauvage, F Flament, VN Vong, P Hoogvorst, R Pacalet IEEE Transactions on Computers 59 (9), 1250-1263, 2010 | 59 | 2010 |
Silicon-level solutions to counteract passive and active attacks S Guilley, L Sauvage, JL Danger, N Selmane, R Pacalet 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography, 3-17, 2008 | 55 | 2008 |
SoC security: a war against side-channels S Guilley, R Pacalet Annals of Telecommunications-annales des télécommunications, 2004 | 50 | 2004 |
Deliverable D2. 3: Security requirements for automotive on-board networks based on dark-side scenarios A Ruddle, D Ward, B Weyl, S Idrees, Y Roudier, M Friedewald, ... EVITA project, 2009 | 48 | 2009 |
Architectures for cognitive radio testbeds and demonstrators—an overview O Gustafsson, K Amiri, D Andersson, A Blad, C Bonnet, JR Cavallaro, ... 2010 Proceedings of the Fifth International Conference on Cognitive Radio …, 2010 | 37 | 2010 |
A fast pipelined multi-mode DES architecture operating in IP representation S Guilley, P Hoogvorst, R Pacalet Integration 40 (4), 479-489, 2007 | 36 | 2007 |
Improving side-channel attacks by exploiting substitution boxes properties S Guilley, P Hoogvorst, R Pacalet, J Schmidt International Conference on Boolean Functions: Cryptography and Applications …, 2007 | 35 | 2007 |
Evaluation of ASIPs design with LISATek R Muhammad, L Apvrille, R Pacalet Embedded Computer Systems: Architectures, Modeling, and Simulation: 8th …, 2008 | 31 | 2008 |
Security evaluation of a balanced quasi-delay insensitive library S Guilley, F Flament, R Pacalet, P Hoogvorst, Y Mathieu DCIS, Grenoble, France, nov, 2008 | 30* | 2008 |
Formal system‐level design space exploration D Knorreck, L Apvrille, R Pacalet Concurrency and Computation: Practice and Experience 25 (2), 250-264, 2013 | 28 | 2013 |
Fast simulation techniques for design space exploration D Knorreck, L Apvrille, R Pacalet Objects, Components, Models and Patterns: 47th International Conference …, 2009 | 27 | 2009 |
Secured CAD back-end flow for power-analysis-resistant cryptoprocessors S Guilley, F Flament, P Hoogvorst, R Pacalet, Y Mathieu IEEE Design & Test of Computers 24 (6), 546-555, 2007 | 24 | 2007 |
Flexible baseband architectures for future wireless systems R Rasheed, R Pacalet, R Knopp, K Khalfallah 2008 11th EUROMICRO Conference on Digital System Design Architectures …, 2008 | 23 | 2008 |
Secbus: Operating system controlled hierarchical page-based memory bus protection L Su, S Courcambeck, P Guillemin, C Schwarz, R Pacalet 2009 Design, Automation & Test in Europe Conference & Exhibition, 570-573, 2009 | 21 | 2009 |