| A new family of high. performance parallel decimal multipliers A Vázquez, E Antelo, P Montuschi 18th IEEE Symposium on Computer Arithmetic (ARITH'07), 195-204, 2007 | 168 | 2007 |
| Improved design of high-performance parallel decimal multipliers A Vazquez, E Antelo, P Montuschi IEEE Transactions on Computers 59 (5), 679-693, 2009 | 124 | 2009 |
| Conditional speculative decimal addition Á Vázquez, E Antelo 7th Conference on Real Numbers and Computers (RNC 7), 47-57, 2006 | 56 | 2006 |
| A radix-10 SRT divider based on alternative BCD codings A Vazquez, E Antelo, P Montuschi 2007 25th International Conference on Computer Design, 280-287, 2007 | 40 | 2007 |
| Fast Radix-10 Multiplication Using Redundant BCD Codes A Vazquez, E Antelo, JD Bruguera IEEE Transactions on Computers 63 (8), 1902-1914, 2014 | 36 | 2014 |
| A high-performance significand BCD adder with IEEE 754-2008 decimal rounding A Vázquez, E Antelo 2009 19th IEEE Symposium on Computer Arithmetic, 135-144, 2009 | 29 | 2009 |
| Iterative algorithm and architecture for exponential, logarithm, powering, and root extraction Á Vázquez, JD Bruguera IEEE Transactions on Computers 62 (9), 1721-1731, 2012 | 24 | 2012 |
| Efficient implementation of parallel BCD multiplication in LUT-6 FPGAs A Vazquez, F De Dinechin 2010 International Conference on Field-Programmable Technology, 126-133, 2010 | 23 | 2010 |
| Computation of decimal transcendental functions using the CORDIC algorithm A Vázquez, J Villalba, E Antelo 2009 19th IEEE Symposium on Computer Arithmetic, 179-186, 2009 | 21 | 2009 |
| High-performance decimal floating-point units A Vazquez named-content content-type= ref-degree> Ph. D. dissertation</named-content …, 2009 | 20 | 2009 |
| Composite iterative algorithm and architecture for q-th root calculation JD Bruguera 2011 IEEE 20th Symposium on Computer Arithmetic, 52-61, 2011 | 16 | 2011 |
| Area and delay evaluation model for CMOS circuits A Vázquez, E Antelo ac. usc. es, 2012 | 15 | 2012 |
| Implementation of the exponential function in a floating-point unit Á Vázquez, E Antelo Journal of VLSI signal processing systems for signal, image and video …, 2003 | 15 | 2003 |
| Fast ground filtering of airborne LiDAR data based on iterative scan-line spline interpolation J Martínez Sánchez, Á Váquez Álvarez, D López Vilarińo, ... Remote Sensing 11 (19), 2256, 2019 | 10 | 2019 |
| Redundant floating-point decimal CORDIC algorithm A Vazquez, J Villalba-Moreno, E Antelo, EL Zapata IEEE Transactions on Computers 61 (11), 1551-1562, 2011 | 9 | 2011 |
| Multi-operand decimal addition by efficient reuse of a binary carry-save adder tree A Vazquez, E Antelo 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals …, 2010 | 9 | 2010 |
| Multi-operand decimal tree adders for FPGAs A Vazquez, F de Dinechin Institut National de Recherche en Informatique et en Automatique, 1-20, 2010 | 8 | 2010 |
| New insights on Ling adders A Vazquez, E Antelo 2008 International Conference on Application-Specific Systems, Architectures …, 2008 | 8 | 2008 |
| Multi-operand decimal adder trees for FPGAs A Vazquez, F De Dinechin INRIA, 2010 | 5 | 2010 |
| A Sum Error Detection Scheme for Decimal Arithmetic A Vazquez, E Antelo 2017 IEEE 24th Symposium on Computer Arithmetic (ARITH), 172-179, 2017 | 2 | 2017 |
