Jean-Didier Legat
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A survey on industrial vision systems, applications and tools
EN Malamas, EGM Petrakis, M Zervakis, L Petit, JD Legat
Image and vision computing 21 (2), 171-188, 2003
A 0.086-mm 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28-nm CMOS
C Frenkel, M Lefebvre, JD Legat, D Bol
IEEE transactions on biomedical circuits and systems 13 (1), 145-158, 2018
Compact and efficient encryption/decryption module for FPGA implementation of the AES Rijndael very well suited for small embedded applications
G Rouvroy, FX Standaert, JJ Quisquater, JD Legat
International Conference on Information Technology: Coding and Computing …, 2004
Efficient implementation of Rijndael encryption in reconfigurable hardware: Improvements and design tradeoffs
FX Standaert, G Rouvroy, JJ Quisquater, JD Legat
Cryptographic Hardware and Embedded Systems-CHES 2003: 5th International …, 2003
Interests and limitations of technology scaling for subthreshold logic
D Bol, R Ambroise, D Flandre, JD Legat
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (10 …, 2009
Image compression by self-organized Kohonen map
C Amerijckx, M Verleysen, P Thissen, JD Legat
IEEE Transactions on neural networks 9 (3), 503-507, 1998
ULPFA: A new efficient design of a power-aware full adder
I Hassoune, D Flandre, I O'Connor, JD Legat
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (8), 2066-2074, 2008
SleepWalker: A 25-MHz 0.4-V Sub- 7- Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes
D Bol, J De Vos, C Hocquet, F Botman, F Durvaux, S Boyd, D Flandre, ...
IEEE Journal of Solid-State Circuits 48 (1), 20-32, 2012
RASH: Radon soft hash algorithm
F Lefebvre, B Macq, JD Legat
2002 11th European Signal Processing Conference, 1-4, 2002
Combined line-based architecture for the 5-3 and 9-7 wavelet transform of JPEG2000
G Dillen, B Georis, JD Legat, O Cantineau
IEEE Transactions on Circuits and Systems for video technology 13 (9), 944-950, 2003
ICEBERG: An involutional cipher efficient for block encryption in reconfigurable hardware
FX Standaert, G Piret, G Rouvroy, JJ Quisquater, JD Legat
Fast Software Encryption: 11th International Workshop, FSE 2004, Delhi …, 2004
MorphIC: A 65-nm 738k-Synapse/mm Quad-Core Binary-Weight Digital Neuromorphic Processor With Stochastic Spike-Driven Online Learning
C Frenkel, JD Legat, D Bol
IEEE transactions on biomedical circuits and systems 13 (5), 999-1010, 2019
Analog implementation of a Kohonen map with on-chip learning
D Macq, M Verleysen, P Jespers, JD Legat
IEEE Transactions on Neural Networks 4 (3), 456-461, 1993
A time-memory tradeo. Using distinguished points: new analysis & FPGA results
FX Standaert, G Rouvroy, JJ Quisquater, JD Legat
Cryptographic Hardware and Embedded Systems-CHES 2002: 4th International …, 2003
A dynamic current mode logic to counteract power analysis attacks
F Macé, FX Standaert, I Hassoune, JD Legat, JJ Quisquater
Proc. 19th International Conference on Design of Circuits and Integrated …, 2004
A methodology to implement block ciphers in reconfigurable hardware and its application to fast and compact AES RIJNDAEL
FX Standaert, G Rouvroy, JJ Quisquater, JD Legat
Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field …, 2003
Enhancing security in the memory management unit
T Gilmont, JD Legat, JJ Quisquater
Proceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for …, 1999
An evaluation of dynamic partial reconfiguration for signal and image processing in professional electronics applications
P Manet, D Maufroid, L Tosi, G Gailliard, O Mulertt, M Di Ciano, JD Legat, ...
EURASIP Journal on Embedded Systems 2008, 1-11, 2009
Green SoCs for a sustainable Internet-of-Things
D Bol, J De Vos, F Botman, G de Streel, S Bernard, D Flandre, JD Legat
2013 IEEE Faible Tension Faible Consommation, 1-4, 2013
Image compression using self-organizing maps
C Amerijckx, JD Legat, M Verleysen
Systems analysis modelling simulation 43 (11), 1529-1543, 2003
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