| 2D materials: roadmap to CMOS integration C Huyghebaert, T Schram, Q Smets, TK Agarwal, D Verreck, S Brems, ... 2018 IEEE International Electron Devices Meeting (IEDM), 22.1. 1-22.1. 4, 2018 | 94 | 2018 |
| Ultra-scaled MOCVD MoS2 MOSFETs with 42nm contact pitch and 250µA/µm drain current Q Smets, G Arutchelvan, J Jussot, D Verreck, I Asselberghs, AN Mehta, ... 2019 IEEE International Electron Devices Meeting (IEDM), 23.2. 1-23.2. 4, 2019 | 81 | 2019 |
| Quantum mechanical performance predictions of pnin versus pocketed line tunnel field-effect transistors D Verreck, AS Verhulst, KH Kao, WG Vandenberghe, K De Meyer, ... IEEE transactions on electron devices 60 (7), 2128-2134, 2013 | 68 | 2013 |
| InGaAs tunnel FET with sub-nanometer EOT and sub-60 mV/dec sub-threshold swing at room temperature A Alian, Y Mols, CCM Bordallo, D Verreck, A Verhulst, A Vandooren, ... Applied Physics Letters 109 (24), 2016 | 67 | 2016 |
| Part I: Impact of field-induced quantum confinement on the subthreshold swing behavior of line TFETs AM Walke, AS Verhulst, A Vandooren, D Verreck, E Simoen, VR Rao, ... IEEE transactions on electron devices 60 (12), 4057-4064, 2013 | 60 | 2013 |
| InGaAs tunnel diodes for the calibration of semi-classical and quantum mechanical band-to-band tunneling models Q Smets, D Verreck, AS Verhulst, R Rooyackers, C Merckling, ... Journal of Applied Physics 115 (18), 2014 | 58 | 2014 |
| Record performance InGaAs homo-junction TFET with superior SS reliability over MOSFET A Alian, J Franco, A Vandooren, Y Mols, A Verhulst, S El Kazzi, ... 2015 IEEE International Electron Devices Meeting (IEDM), 31.7. 1-31.7. 4, 2015 | 43 | 2015 |
| Impact of device scaling on the electrical properties of MoS2 field-effect transistors G Arutchelvan, Q Smets, D Verreck, Z Ahmed, A Gaur, S Sutar, J Jussot, ... Scientific reports 11 (1), 6610, 2021 | 37 | 2021 |
| Wafer-scale integration of double gated WS2-transistors in 300mm Si CMOS fab I Asselberghs, Q Smets, T Schram, B Groven, D Verreck, A Afzalian, ... 2020 IEEE International Electron Devices Meeting (IEDM), 40.2. 1-40.2. 4, 2020 | 35 | 2020 |
| Introducing 2D-FETs in device scaling roadmap using DTCO Z Ahmed, A Afzalian, T Schram, D Jang, D Verreck, Q Smets, ... 2020 IEEE International Electron Devices Meeting (IEDM), 22.5. 1-22.5. 4, 2020 | 35 | 2020 |
| Uniform strain in heterostructure tunnel field-effect transistors D Verreck, AS Verhulst, ML Van de Put, B Sorée, N Collaert, A Mocuta, ... IEEE electron device letters 37 (3), 337-340, 2016 | 26 | 2016 |
| Perspective of tunnel-FET for future low-power technology nodes AS Verhulst, D Verreck, Q Smets, KH Kao, M Van de Put, R Rooyackers, ... 2014 IEEE International Electron Devices Meeting, 30.2. 1-30.2. 4, 2014 | 26 | 2014 |
| The Tunnel Field-Effect Transistor D Verreck, G Groeseneken, A Verhulst Wiley Encyclopedia of Electrical and Electronics Engineering, 2016 | 24 | 2016 |
| Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic D Verreck, AS Verhulst, B Sorée, N Collaert, A Mocuta, A Thean, ... Applied Physics Letters 105 (24), 2014 | 22 | 2014 |
| Dual gate synthetic WS2 MOSFETs with 120μS/μm Gm 2.7μF/cm2 capacitance and ambipolar channel D Lin, X Wu, D Cott, D Verreck, B Groven, S Sergeant, Q Smets, S Sutar, ... 2020 IEEE International Electron Devices Meeting (IEDM), 3.6. 1-3.6. 4, 2020 | 21 | 2020 |
| The Role of Nonidealities in the Scaling of MoS2 FETs D Verreck, G Arutchelvan, CJL De La Rosa, A Leonhardt, D Chiappe, ... IEEE Transactions on Electron Devices 65 (10), 4635-4640, 2018 | 21 | 2018 |
| Quantum mechanical solver for confined heterostructure tunnel field-effect transistors D Verreck, M Van de Put, B Sorée, AS Verhulst, W Magnus, ... Journal of Applied Physics 115 (5), 2014 | 21 | 2014 |
| Understanding ambipolar transport in MoS2 field effect transistors: the substrate is the key V Mootheri, A Leonhardt, D Verreck, I Asselberghs, C Huyghebaert, ... Nanotechnology 32 (13), 135202, 2021 | 20 | 2021 |
| Band-tails tunneling resolving the theory-experiment discrepancy in Esaki diodes J Bizindavyi, AS Verhulst, Q Smets, D Verreck, B Sorée, G Groeseneken IEEE Journal of the Electron Devices Society 6, 633-641, 2018 | 19 | 2018 |
| Scaling of double-gated WS2 FETs to sub-5nm physical gate length fabricated in a 300mm FAB Q Smets, T Schram, D Verreck, D Cott, B Groven, Z Ahmed, B Kaczer, ... 2021 IEEE International Electron Devices Meeting (IEDM), 34.2. 1-34.2. 4, 2021 | 17 | 2021 |
