Follow
Hajime Shibata
Hajime Shibata
Verified email at analog.com
Title
Cited by
Cited by
Year
A DC-to-1 GHz Tunable RF ADC Achieving DR 74 dB and BW 150 MHz at 450 MHz Using 550 mW
H Shibata, R Schreier, W Yang, A Shaikh, D Paterson, TC Caldwell, ...
IEEE journal of solid-state circuits 47 (12), 2888-2897, 2012
1712012
A 100mW 10MHz-BW CT ΔΣ Modulator with 87dB DR and 91dBc IMD
W Yang, W Schofield, H Shibata, S Korrapati, A Shaikh, N Abaskharoun, ...
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
1102008
A 375-mW Quadrature BandpassADC With 8.5-MHz BW and 90-dB DR at 44 MHz
R Schreier, N Abaskharoun, H Shibata, D Paterson, S Rose, I Mehr, ...
IEEE Journal of Solid-State Circuits 41 (12), 2632-2640, 2006
672006
15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS
Y Dong, J Zhao, W Yang, T Caldwell, H Shibata, R Schreier, Q Meng, ...
2016 IEEE International Solid-State Circuits Conference (ISSCC), 278-279, 2016
652016
A 72 db-dr 465 mhz-bw continuous-time 1-2 mash adc in 28 nm cmos
Y Dong, J Zhao, WW Yang, T Caldwell, H Shibata, Z Li, R Schreier, ...
IEEE Journal of Solid-State Circuits 51 (12), 2917-2927, 2016
622016
A 9-GS/s 1.125-GHz BW oversampling continuous-time pipeline ADC achieving− 164-dBFS/Hz NSD
H Shibata, V Kozlov, Z Ji, A Ganesan, H Zhu, D Paterson, J Zhao, S Patil, ...
IEEE Journal of Solid-State Circuits 52 (12), 3219-3234, 2017
602017
16.6 an 800mhz-bw vco-based continuous-time pipelined adc with inherent anti-aliasing and on-chip digital reconstruction filter
H Shibata, G Taylor, B Schell, V Kozlov, S Patil, D Paterson, A Ganesan, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 260-262, 2020
432020
A 375mW Quadrature Bandpass/spl Delta//spl Sigma/ADC with 90dB DR and 8.5 MHz BW at 44MHz
R Schreier, N Abaskharoun, H Shibata, I Mehr, S Rose, D Paterson
2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006
332006
16.2 A 9GS/s 1GHz-BW oversampled continuous-time pipeline ADC achieving− 161dBFS/Hz NSD
H Shibata, V Kozlov, Z Ji, A Ganesan, H Zhu, D Paterson
2017 IEEE International Solid-State Circuits Conference (ISSCC), 278-279, 2017
302017
Continuous-time pipelined analog-to-digital converters: A mini-tutorial
S Pavan, H Shibata
IEEE Transactions on Circuits and Systems II: Express Briefs 68 (3), 810-815, 2021
252021
LC lattice delay line for high-speed ADC applications
Y Dong, Z Li, RE Schreier, H Shibata, TC Caldwell
US Patent 9,312,840, 2016
252016
Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS
Y Dong, B Jose, Q Meng, J Zhao, W Yang, T Caldwell, H Shibata, Z Li, ...
2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017
242017
Multi-stage noise shaping analog-to-digital converter
Y Dong, H Shibata, WW Yang, RE Schreier
US Patent 9,178,529, 2015
232015
Continuous-time oversampling pipeline analog-to-digital converter
H Shibata
US Patent 8,896,475, 2014
232014
Automated design of analog circuits using cell-based structure
H Shibata, S Mori, N Fujii
Proceedings 2002 NASA/DoD Conference on Evolvable Hardware, 85-92, 2002
232002
Advances in high-speed continuous-time delta-sigma modulators
T Caldwell, D Alldred, R Schreier, H Shibata, Y Dong
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 1-8, 2014
202014
Adaptive digital quantization noise cancellation filters for mash ADCs
Q Meng, H Shibata, RE Schreier, MS McCORMICK, Y Dong, JB Silva, ...
US Patent 9,768,793, 2017
172017
Analog circuit synthesis by superimposing of sub-circuits
H Shibata, N Fujii
ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001
162001
Dither injection for continuous-time MASH ADCS
Y Dong, H Shibata, TC Caldwell, Z Li, J Zhao, JB Silva
US Patent 9,838,031, 2017
142017
Estimation of digital-to-analog converter static mismatch errors
J Zhao, RE Schreier, JB Silva, H Shibata, WW Yang, Y Dong
US Patent 9,203,426, 2015
142015
The system can't perform the operation now. Try again later.
Articles 1–20