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Sunil Khatri
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VIS: A system for verification and synthesis
RK Brayton, GD Hachtel, A Sangiovanni-Vincentelli, F Somenzi, A Aziz, ...
Computer Aided Verification: 8th International Conference, CAV'96 New …, 1996
9541996
Analysis and avoidance of cross-talk in on-chip buses
C Duan, A Tirumala, SP Khatri
HOT 9 Interconnects. Symposium on High Performance Interconnects, 133-138, 2001
2082001
Towards acceleration of fault simulation using graphics processing units
K Gulati, SP Khatri
Proceedings of the 45th Annual Design Automation Conference, 822-827, 2008
1392008
Efficient on-chip crosstalk avoidance CODEC design
C Duan, VHC Calle, SP Khatri
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (4), 551-560, 2009
1312009
A novel VLSI layout fabric for deep sub-micron applications
SP Khatri, A Mehrotra, RK Brayton, RHJM Otten, ...
Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 491-496, 1999
1271999
A fast hardware approach for approximate, efficient logarithm and antilogarithm computations
S Paul, N Jayakumar, SP Khatri
IEEE transactions on very large scale integration (vlsi) systems 17 (2), 269-277, 2008
1112008
Fast circuit simulation on graphics processing units
K Gulati, JF Croix, SP Khatri, R Shastry
2009 Asia and South Pacific Design Automation Conference, 403-408, 2009
992009
Multi-valued logic synthesis
RK Brayton, SP Khatri
Proceedings Twelfth International Conference on VLSI Design.(Cat. No …, 1999
861999
Cross-talk immune VLSI design using a network of PLAs embedded in a regular layout fabric
SP Khatri, RK Brayton, A Sangiovanni-Vincentelli
IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE …, 2000
832000
A design approach for radiation-hard digital electronics
R Garg, N Jayakumar, SP Khatri, G Choi
Proceedings of the 43rd annual Design Automation Conference, 773-778, 2006
812006
Accelerating statistical static timing analysis using graphics processing units
K Gulati, SP Khatri
2009 Asia and South Pacific Design Automation Conference, 260-265, 2009
762009
A DCVSL delay cell for fast low power frequency synthesis applications
DZ Turker, SP Khatri, E Sánchez-Sinencio
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (6), 1225-1238, 2011
752011
Practical techniques to reduce skew and its variations in buffered clock networks
G Venkataraman, N Jayakumar, J Hu, P Li, S Khatri, A Rajaram, ...
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005
692005
A novel clock distribution and dynamic de-skewing methodology
A Kapoor, N Jayakumar, SP Khatri
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
632004
Exploiting crosstalk to speed up on-chip buses
C Duan, SP Khatri
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
592004
Clock distribution scheme using coplanar transmission lines
VH Cordero, SP Khatri
Proceedings of the conference on Design, automation and test in Europe, 985-990, 2008
582008
Addressing the timing closure problem by integrating logic optimization and placement
W Gosti, SR Khatri, AL Sangiovanni-Vincentelli
IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE …, 2001
572001
Forbidden transition free crosstalk avoidance CODEC design
C Duan, C Zhu, SP Khatri
Proceedings of the 45th annual Design Automation Conference, 986-991, 2008
562008
Datapath design methodology and routing apparatus
S Das, SP Khatri
US Patent 6,598,215, 2003
532003
On and off-chip crosstalk avoidance in VLSI design
C Duan, BJ LaMeres, SP Khatri
Springer, 2010
512010
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