Zhen Hang Jiang
Zhen Hang Jiang
Geverifieerd e-mailadres voor husky.neu.edu
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A complete key recovery timing attack on a GPU
ZH Jiang, Y Fei, D Kaeli
2016 IEEE International symposium on high performance computer architecture …, 2016
712016
A novel side-channel timing attack on GPUs
ZH Jiang, Y Fei, D Kaeli
Proceedings of the on Great Lakes Symposium on VLSI 2017, 167-172, 2017
522017
A timing side-channel attack on a mobile gpu
E Karimi, ZH Jiang, Y Fei, D Kaeli
2018 IEEE 36th International Conference on Computer Design (ICCD), 67-74, 2018
162018
A Novel Cache Bank Timing Attack
ZH Jiang, Y Fei
Computer-Aided Design (ICCAD), 2017 IEEE/ACM International Conference on, 2017
112017
Exploiting bank conflict-based side-channel timing leakage of gpus
ZH Jiang, Y Fei, D Kaeli
ACM Transactions on Architecture and Code Optimization (TACO) 16 (4), 1-24, 2019
62019
Compiler-assisted threshold implementation against power analysis attacks
P Luo, K Athanasiou, L Zhang, ZH Jiang, Y Fei, AA Ding, T Wahl
2017 IEEE International Conference on Computer Design (ICCD), 541-544, 2017
42017
Statistical Analysis for Access-Driven Cache Attacks Against AES.
L Zhang, AA Ding, Y Fei, ZH Jiang
IACR Cryptol. ePrint Arch. 2016, 970, 2016
42016
Memory-based Side-channel Attacks and Countermeasure
ZH Jiang
Northeastern University Boston, 2019
2019
MemPoline: Mitigating Memory-based Side-Channel Attacks through Memory Access Obfuscation
ZH Jiang, Y Fei, AA Ding, T Wahl
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Artikelen 1–9