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Fabio Frustaci
Fabio Frustaci
Electronics Engineering
Verified email at deis.unical.it
Title
Cited by
Cited by
Year
SRAM for error-tolerant applications with dynamic energy-quality management in 28 nm CMOS
F Frustaci, M Khayatzadeh, D Blaauw, D Sylvester, M Alioto
IEEE Journal of Solid-state circuits 50 (5), 1310-1323, 2015
872015
Analytical delay model considering variability effects in subthreshold domain
F Frustaci, P Corsonello, S Perri
IEEE Transactions on Circuits and Systems II: Express Briefs 59 (3), 168-172, 2012
592012
Approximate SRAMs with dynamic energy-quality management
F Frustaci, D Blaauw, D Sylvester, M Alioto
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (6 …, 2016
542016
Low-power split-path data-driven dynamic logic
F Frustaci, M Lanuzza, P Zicari, S Perri, P Corsonello
IET circuits, devices & systems 3 (6), 303-312, 2009
492009
Design of efficient BCD adders in quantum-dot cellular automata
G Cocorullo, P Corsonello, F Frustaci, S Perri
IEEE Transactions on Circuits and Systems II: Express Briefs 64 (5), 575-579, 2016
452016
High-performance noise-tolerant circuit techniques for CMOS dynamic logic
F Frustaci, P Corsonello, S Perri, G Cocorullo
IET circuits, devices & systems 2 (6), 537-548, 2008
452008
Techniques for leakage energy reduction in deep submicrometer cache memories
F Frustaci, P Corsonello, S Perri, G Cocorullo
IEEE transactions on very large scale integration (vlsi) systems 14 (11 …, 2006
412006
13.8 A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS
F Frustaci, M Khayatzadeh, D Blaauw, D Sylvester, M Alioto
2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014
402014
Designing high-speed adders in power-constrained environments
F Frustaci, M Lanuzza, P Zicari, S Perri, P Corsonello
IEEE Transactions on Circuits and Systems II: Express Briefs 56 (2), 172-176, 2009
392009
An embedded machine vision system for an in-line quality check of assembly processes
F Frustaci, S Perri, G Cocorullo, P Corsonello
Procedia Manufacturing 42, 211-218, 2020
352020
Comparative analysis of yield optimized pulsed flip-flops
M Lanuzza, R De Rose, F Frustaci, S Perri, P Corsonello
Microelectronics Reliability 52 (8), 1679-1689, 2012
332012
A new low-power high-speed single-clock-cycle binary comparator
F Frustaci, S Perri, M Lanuzza, P Corsonello
Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010
302010
Exploiting self-reconfiguration capability to improve sram-based fpga robustness in space and avionics applications
M Lanuzza, P Zicari, F Frustaci, S Perri, P Corsonello
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 4 (1), 1-22, 2010
292010
Energy-quality scalable adders based on nonzeroing bit truncation
F Frustaci, S Perri, P Corsonello, M Alioto
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (4), 964-968, 2018
282018
Energy‐efficient single‐clock‐cycle binary comparator
F Frustaci, S Perri, M Lanuzza, P Corsonello
International Journal of Circuit Theory and Applications 40 (3), 237-246, 2012
272012
Design of efficient QCA multiplexers
G Cocorullo, P Corsonello, F Frustaci, S Perri
International Journal of Circuit Theory and Applications 44 (3), 602-615, 2016
252016
Efficient approximate adders for FPGA-based data-paths
S Perri, F Spagnolo, F Frustaci, P Corsonello
Electronics 9 (9), 1529, 2020
242020
Approximate multipliers with dynamic truncation for energy reduction via graceful quality degradation
F Frustaci, S Perri, P Corsonello, M Alioto
IEEE Transactions on Circuits and Systems II: Express Briefs 67 (12), 3427-3431, 2020
232020
Design of real-time FPGA-based embedded system for stereo vision
S Perri, F Frustaci, F Spagnolo, P Corsonello
2018 IEEE international symposium on circuits and systems (ISCAS), 1-5, 2018
232018
An efficient connected component labeling architecture for embedded systems
F Spagnolo, F Frustaci, S Perri, P Corsonello
Journal of Low Power Electronics and Applications 8 (1), 7, 2018
232018
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