| High-frequency scalable electrical model and analysis of a through silicon via (TSV) J Kim, JS Pak, J Cho, E Song, J Cho, H Kim, T Song, J Lee, H Lee, K Park, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 1 (2 …, 2011 | 497 | 2011 |
| Measurement and analysis of a high-speed TSV channel H Kim, J Cho, M Kim, K Kim, J Lee, H Lee, K Park, K Choi, HC Bae, J Kim, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 2 …, 2012 | 68 | 2012 |
| Through silicon via (TSV) defect modeling, measurement, and analysis DH Jung, Y Kim, JJ Kim, H Kim, S Choi, YH Song, HC Bae, KS Choi, ... IEEE transactions on components, packaging and manufacturing technology 7 (1 …, 2016 | 58 | 2016 |
| Modeling and analysis of a power distribution network in TSV-based 3-D memory IC including P/G TSVs, on-chip decoupling capacitors, and silicon substrate effects K Kim, C Hwang, K Koo, J Cho, H Kim, J Kim, J Lee, HD Lee, KW Park, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 2 …, 2012 | 56 | 2012 |
| Signal integrity design and analysis of silicon interposer for GPU-memory channels in high-bandwidth memory interface K Cho, Y Kim, H Lee, H Kim, S Choi, J Song, S Kim, J Park, S Lee, J Kim IEEE Transactions on Components, Packaging and Manufacturing Technology 8 (9 …, 2018 | 50 | 2018 |
| Fast and precise high-speed channel modeling and optimization technique based on machine learning H Kim, C Sui, K Cai, B Sen, J Fan IEEE Transactions on Electromagnetic Compatibility 60 (6), 2049-2052, 2017 | 46 | 2017 |
| Interposer power distribution network (PDN) modeling using a segmentation method for 3-D ICs with TSVs K Kim, JM Yook, J Kim, H Kim, J Lee, K Park, J Kim IEEE Transactions on Components, Packaging and Manufacturing Technology 3 …, 2013 | 40 | 2013 |
| Electrical design of through silicon via M Lee, JS Pak, J Kim Springer, 2014 | 39 | 2014 |
| 30 Gbps high-speed characterization and channel performance of coaxial through silicon via DH Jung, H Kim, S Kim, JJ Kim, B Bae, J Kim, JM Yook, JC Kim, J Kim IEEE Microwave and Wireless Components Letters 24 (11), 814-816, 2014 | 36 | 2014 |
| Mixed-mode ABCD parameters: Theory and application to signal integrity analysis of PCB-level differential interconnects J Cho, E Song, H Kim, S Ahn, JS Pak, J Kim, J Kim IEEE transactions on electromagnetic compatibility 53 (3), 814-822, 2010 | 28 | 2010 |
| Precise analytical model of power supply induced jitter transfer function at inverter chains H Kim, J Kim, J Fan, C Hwang IEEE Transactions on Electromagnetic Compatibility 60 (5), 1491-1499, 2017 | 27 | 2017 |
| Design optimization of high bandwidth memory (HBM) interposer considering signal integrity K Cho, H Lee, H Kim, S Choi, Y Kim, J Lim, J Kim, H Kim, Y Kim, Y Kim 2015 IEEE Electrical Design of Advanced Packaging and Systems Symposium …, 2015 | 27 | 2015 |
| Coil design for 100 KHz and 6.78 MHz WPT system: Litz and solid wires and winding methods J Cho, J Sun, H Kim, J Fan, Y Lu, S Pan 2017 IEEE International Symposium on Electromagnetic Compatibility & Signal …, 2017 | 25 | 2017 |
| Design and analysis of power distribution network (PDN) for high bandwidth memory (HBM) interposer in 2.5 D terabyte/s bandwidth graphics module K Cho, Y Kim, H Lee, H Kim, S Choi, S Kim, J Kim 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 407-412, 2016 | 25 | 2016 |
| Modeling of power supply induced jitter (PSIJ) transfer function at inverter chains H Kim, J Fan, C Hwang 2017 IEEE International Symposium on Electromagnetic Compatibility & Signal …, 2017 | 23 | 2017 |
| Power distribution network design and optimization based on frequency dependent target impedance Y Kim, K Kim, J Cho, J Kim, K Kang, T Yang, Y Ra, W Paik 2015 IEEE Electrical Design of Advanced Packaging and Systems Symposium …, 2015 | 23 | 2015 |
| A wideband on-interposer passive equalizer design for chip-to-chip 30-Gb/s serial data transmission H Kim, J Cho, J Kim, S Choi, K Kim, J Lee, K Park, JS Pak, J Kim IEEE Transactions on Components, Packaging and Manufacturing Technology 5 (1 …, 2014 | 23 | 2014 |
| Design of an on-silicon-interposer passive equalizer for next generation high bandwidth memory with data rate up to 8 Gb/s Y Jeon, H Kim, J Kim, M Je IEEE Transactions on Circuits and Systems I: Regular Papers 65 (7), 2293-2303, 2018 | 19 | 2018 |
| Precise RLGC modeling and analysis of through glass via (TGV) for 2.5 D/3D IC J Kim, I Hwang, Y Kim, J Cho, V Sundaram, R Tummala, J Kim 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 254-259, 2015 | 19 | 2015 |
| Electrical performance of high bandwidth memory (HBM) interposer channel in terabyte/s bandwidth graphics module H Lee, K Cho, H Kim, S Choi, J Lim, J Kim 2015 International 3D Systems Integration Conference (3DIC), TS2. 2.1-TS2. 2.4, 2015 | 17 | 2015 |
