| Multiplier energy reduction through bypassing of partial products J Ohban, VG Moshnyaga, K Inoue Asia-Pacific conference on circuits and systems 2, 13-17, 2002 | 109 | 2002 |
| LCD display energy reduction by user monitoring VG Moshnyaga, E Morikawa 2005 International Conference on Computer Design, 94-97, 2005 | 63 | 2005 |
| A comparative study of switching activity reduction techniques for design of low-power multipliers VG Moshnyaga, K Tamaru Proceedings of ISCAS'95-International Symposium on Circuits and Systems 3 …, 1995 | 57 | 1995 |
| An efficient implementation of 1-D median filter VG Moshnyaga, K Hashimoto 2009 52nd IEEE International Midwest Symposium on Circuits and Systems, 451-454, 2009 | 49 | 2009 |
| A new computationally adaptive formulation of block-matching motion estimation VG Moshnyaga IEEE transactions on circuits and systems for video technology 11 (1), 118-124, 2001 | 34 | 2001 |
| The use of thermal ir array sensor for indoor fall detection A Hayashida, V Moshnyaga, K Hashimoto 2017 IEEE international conference on systems, man, and cybernetics (SMC …, 2017 | 33 | 2017 |
| A medication adherence monitoring system for people with dementia V Moshnyaga, M Koyanagi, F Hirayama, A Takahama, K Hashimoto 2016 IEEE International Conference on Systems, Man, and Cybernetics (SMC …, 2016 | 32 | 2016 |
| A history-based I-cache for low-energy multimedia applications K Inoue, VG Moshnyaga, K Murakami Proceedings of the 2002 international symposium on Low power electronics and …, 2002 | 30 | 2002 |
| Algorithm optimizations for low-complexity eye tracking S Yamamoto, VG Moshnyaga 2009 IEEE International Conference on Systems, Man and Cybernetics, 18-22, 2009 | 29 | 2009 |
| A FPGA implementation of low-complexity noise removal T Matsubara, VG Moshnyaga, K Hashimoto 2010 17th IEEE international conference on electronics, circuits and systems …, 2010 | 28 | 2010 |
| A placement driven methodology for high-level synthesis of sub-micron ASIC's VG Moshnyaga, K Tamaru 1996 IEEE International Symposium on Circuits and Systems. Circuits and …, 1996 | 26 | 1996 |
| Low power cache design VG Moshnyaga, K Inoue Low-Power Electronics Design, 2006 | 22 | 2006 |
| A smart carpet design for monitoring people with dementia O Tanaka, T Ryu, A Hayashida, VG Moshnyaga, K Hashimoto Progress in Systems Engineering: Proceedings of the Twenty-Third …, 2015 | 21 | 2015 |
| Reducing multiplier energy by data-driven voltage variation T Yamanaka, VG Moshnyaga 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No …, 2004 | 21 | 2004 |
| An MSB truncation scheme for low-power video processors VG Moshnyaga 1999 IEEE International Symposium on Circuits and Systems (ISCAS) 4, 291-294, 1999 | 20 | 1999 |
| An efficient Hamming distance comparator for low-power applications M Fujino, VG Moshnyaga 9th International Conference on Electronics, Circuits and Systems 2, 641-644, 2002 | 19 | 2002 |
| Trends in high-performance, low-power cache memory architectures K Inoue, VG Moshnyaga, K Murakami IEICE Transactions on Electronics 85 (2), 304-314, 2002 | 18 | 2002 |
| Dynamic operand transformation for low-power multiplier-accumulator design M Fujino, VG Moshnyaga Proceedings of the 2003 International Symposium on Circuits and Systems …, 2003 | 17 | 2003 |
| A low energy set-associative I-Cache with extended BTB K Inoue, VG Moshnyaga, K Murakami Proceedings. IEEE International Conference on Computer Design: VLSI in …, 2002 | 16 | 2002 |
| A floorplan based methodology for data-path synthesis of sub-micron ASICs VG Moshnyaga, K Tamaru IEICE TRANSACTIONS on Information and Systems 79 (10), 1389-1395, 1996 | 16 | 1996 |
