| The interpretation and application of Rent's rule P Christie, D Stroobandt IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (6), 639-648, 2000 | 358 | 2000 |
| Analog and digital circuit design in 65 nm CMOS: End of the road? G Gielen, W Dehaene Design, Automation and Test in Europe, 37-42, 2005 | 100 | 2005 |
| High-mobility 0.85nm-EOT Si0.45Ge0.55-pFETs: Delivering high performance at scaled VDD J Mitard, L Witters, MG Bardon, P Christie, J Franco, A Mercha, ... 2010 International Electron Devices Meeting, 10.6. 1-10.6. 4, 2010 | 43 | 2010 |
| The analytical form of the length distribution function for computer interconnection JE Cotter, P Christie IEEE Transactions on circuits and systems 38 (3), 317-320, 1991 | 41 | 1991 |
| A fractal analysis of interconnection complexity P Christie Proceedings of the IEEE 81 (10), 1492-1499, 1993 | 40 | 1993 |
| Comparison of silicon ring modulators with interdigitated and lateral PN junctions M Pantouvaki, H Yu, M Rakowski, P Christie, P Verheyen, G Lepage, ... IEEE Journal of Selected Topics in Quantum Electronics 19 (2), 7900308-7900308, 2012 | 35 | 2012 |
| First observation of FinFET specific mismatch behavior and optimization guidelines for SRAM scaling T Merelle, G Curatola, A Nackaerts, N Collaert, MJH Van Dal, G Doornbos, ... 2008 IEEE International Electron Devices Meeting, 1-4, 2008 | 32 | 2008 |
| Demonstration of an extendable and industrial 300mm BEOL integration for the 65-nm technology node O Hinsinger, R Fox, E Sabouret, C Goldberg, C Verove, W Besling, P Brun, ... IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 28 | 2004 |
| A differential equation for placement analysis P Christie IEEE transactions on very large scale integration (VLSI) systems 9 (6), 913-921, 2001 | 25 | 2001 |
| Prelayout interconnect yield prediction P Christie, JP de Gyvez IEEE transactions on very large scale integration (VLSI) systems 11 (1), 55-59, 2003 | 20 | 2003 |
| Pre-layout prediction of interconnect manufacturability P Christie, J Pineda de Gyvez Proceedings of the 2001 international workshop on System-level interconnect …, 2001 | 18 | 2001 |
| On ambient intelligence, needful things and process technologies C van der Poel, F Pessolano, R Roovers, F Widdershoven, ... Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat …, 2004 | 17 | 2004 |
| Stochastic wire length sampling for cycle time estimation M Iqbal, A Sharkawy, U Hameed, P Christie Proceedings of the 2002 international workshop on System-level interconnect …, 2002 | 15 | 2002 |
| Si1-xGex-channel PFETs: Scalability, layout considerations and compatibility with other stress techniques G Eneman, G Hellings, J Mitard, L Witters, S Yamaguchi, MG Bardon, ... ECS Transactions 35 (3), 493, 2011 | 14 | 2011 |
| Multi-objective optimization of interconnect geometry RA Wildman, JI Kramer, DS Weile, P Christie IEEE transactions on very large scale integration (VLSI) systems 11 (1), 15-23, 2003 | 13 | 2003 |
| Balancing resistance and capacitance of signal interconnects for power saving VN Hoang, G Doornbos, J Michelon, A Kumar, A Nackaerts, P Christie 2007 IEEE International Interconnect Technology Conferencee, 126-128, 2007 | 12 | 2007 |
| The impact of back-end-of-line process variations on critical path timing VN Hoang, A Kumar, P Christie 2006 International Interconnect Technology Conference, 193-195, 2006 | 12 | 2006 |
| An analysis of the effect of wire resistance on circuit level performance at the 45-nm technology node VH Nguyen, P Christie, A Heringa, A Kumar, R Ng Proceedings of the IEEE 2005 International Interconnect Technology …, 2005 | 12 | 2005 |
| The impact of interstratal interconnect density on the performance of three-dimensional integrated circuits VH Nguyen, P Christie Proceedings of the 2005 international workshop on System level interconnect …, 2005 | 9 | 2005 |
| Fractal description of computer interconnections P Christie, SB Styer Microelectronic Interconnects and Packages: System and Process Integration …, 1991 | 9 | 1991 |
