Intel Xeon Phi processor high performance programming: knights landing edition J Jeffers, J Reinders, A Sodani Morgan Kaufmann, 2016 | 416 | 2016 |
Defect clustering viewed through generalized Poisson distribution A Tyagi, MA Bayoumi IEEE Transactions on Semiconductor manufacturing 5 (3), 196-206, 1992 | 45 | 1992 |
Image segmentation on a 2D array by a directed split and merge procedure A Tyagi, MA Bayoumi IEEE Transactions on Signal Processing 40 (11), 2804-2813, 1992 | 31 | 1992 |
{TheHuzz}: Instruction fuzzing of processors using {Golden-Reference} models for finding {Software-Exploitable} vulnerabilities R Kande, A Crump, G Persyn, P Jauernig, AR Sadeghi, A Tyagi, ... 31st USENIX Security Symposium (USENIX Security 22), 3219-3236, 2022 | 27 | 2022 |
VLSI design methodologies for digital signal processing architectures MA Bayoumi Springer Science & Business Media, 2012 | 27 | 2012 |
How good is your verilog rtl code? a quick answer from machine learning P Sengupta, A Tyagi, Y Chen, J Hu Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 15 | 2022 |
Machine learning-guided stimulus generation for functional verification S Gogri, J Hu, A Tyagi, M Quinn, S Ramachandran, F Batool, ... Proceedings of the Design and Verification Conference (DVCON-USA), Virtual …, 2020 | 14 | 2020 |
The nature of defect patterns on integrated-circuit wafer maps A Tyagi, MA Bayoumi IEEE transactions on reliability 43 (1), 22-29, 1994 | 14 | 1994 |
{HyPFuzz}:{Formal-Assisted} Processor Fuzzing C Chen, R Kande, N Nguyen, F Andersen, A Tyagi, AR Sadeghi, ... 32nd USENIX Security Symposium (USENIX Security 23), 1361-1378, 2023 | 13 | 2023 |
Thehuzz: Instruction fuzzing of processors using golden-reference models for finding software-exploitable vulnerabilities A Tyagi, A Crump, AR Sadeghi, G Persyn, J Rajendran, P Jauernig, ... arXiv preprint arXiv:2201.09941, 2022 | 12 | 2022 |
A generalized poisson based model for defect spatial distribution in WSI A Tyagi, MA Bayoumi 1991 International Conference on Wafer Scale Integration, 149,150,151,152 …, 1991 | 5 | 1991 |
Transaction Level Stimulus Optimization in Functional Verification Using Machine Learning Predictors S Gogri, A Tyagi, M Quinn, J Hu 2022 23rd International Symposium on Quality Electronic Design (ISQED), 71-76, 2022 | 4 | 2022 |
Yield enhancement in the routing phase of integrated circuit layout synthesis A Tyagi, M Bayoumi, P Manthravadi Proceedings of 1994 International Conference on Wafer Scale Integration …, 1994 | 4 | 1994 |
Systolic array implementation of image segmentation by a directed split and merge procedure A Tyagi, M Bayoumi [1990] Proceedings. 10th International Conference on Pattern Recognition 2 …, 1990 | 4 | 1990 |
A post-processing algorithm for short-circuit defect sensitivity reduction in VLSI layouts N Maldonado, G Andrus, A Tyagi, M Madani, M Bayoumi Proceedings IEEE International Conference on Wafer Scale Integration (ICWSI …, 1995 | 3 | 1995 |
ULSI design-for-manufacturability: A yield enhancement approach A Tyagi, MA Bayoumi Proceedings of 3rd International Workshop on the Economics of Design, Test …, 1994 | 3 | 1994 |
Early Identification of Timing Critical RTL Components using ML based Path Delay Prediction P Sengupta, A Tyagi, Y Chen, J Hu 2023 ACM/IEEE 5th Workshop on Machine Learning for CAD (MLCAD), 1-6, 2023 | 1 | 2023 |
A study on Machine Learning-based Hardware Bug Localization S Rajashekar | 1 | 2020 |
A Reconfiguration Technique for Reliable VLSI DSP Array Processors SP Popli, MA Bayoumi, A Tyagi Journal of Circuits, Systems, and Computers 2 (03), 281-304, 1992 | 1 | 1992 |
A systolic array for image segmentation using split and merge procedure A Tyagi, M Bayoumi Proceedings of the 32nd Midwest Symposium on Circuits and Systems,, 345-348, 1989 | 1 | 1989 |