Maurizio Martina
Maurizio Martina
Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino
Verified email at polito.it
Title
Cited by
Cited by
Year
Optimization and implementation of the integer wavelet transform for image coding
M Grangetto, E Magli, M Martina, G Olmo
IEEE transactions on image processing 11 (6), 596-604, 2002
1312002
Multiplierless, folded 9/7–5/3 wavelet VLSI architecture
M Martina, G Masera
IEEE Transactions on Circuits and Systems II: Express Briefs 54 (9), 770-774, 2007
892007
VLSI implementation of a multi-mode turbo/LDPC decoder architecture
C Condo, M Martina, G Masera
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (6), 1441-1454, 2012
642012
High speed architectures for finding the first two maximum/minimum values
LG Amarý, M Martina, G Masera
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (12†…, 2011
562011
Low-complexity, efficient 9/7 wavelet filters VLSI implementation
M Martina, G Masera
IEEE Transactions on Circuits and Systems II: Express Briefs 53 (11), 1289-1293, 2006
552006
On optimal and near-optimal turbo decoding using generalized max operator
S Papaharalabos, PT Mathiopoulos, G Masera, M Martina
IEEE Communications Letters 13 (7), 522-524, 2009
542009
A VLSI architecture for IWT (integer wavelet transform)
M Martina, G Masera, G Piccinini, M Zamboni
Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat†…, 2000
512000
Motion estimation and CABAC VLSI co-processors for real-time high-quality H. 264/AVC video coding
S Saponara, M Martina, M Casula, L Fanucci, G Masera
Microprocessors and Microsystems 34 (7-8), 316-328, 2010
432010
A flexible UMTS-WiMax turbo decoder architecture
M Martina, M Nicola, G Masera
IEEE Transactions on Circuits and Systems II: Express Briefs 55 (4), 369-373, 2008
422008
Turbo NOC: A framework for the design of network-on-chip-based turbo decoder architectures
M Martina, G Masera
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (10), 2776-2789, 2010
402010
Adaptive approximated DCT architectures for HEVC
M Masera, M Martina, G Masera
IEEE Transactions on Circuits and Systems for Video Technology 27 (12), 2714†…, 2016
322016
Novel JPEG 2000 Compliant DWT and IWT VLSI Implementations
M Martina, G Masera, G Piccinini, M Zamboni
Journal of VLSI signal processing systems for signal, image and video†…, 2003
312003
An LDPC decoder architecture for wireless sensor network applications
ADG Biroli, M Martina, G Masera
Sensors 12 (2), 1529-1543, 2012
282012
A network-on-chip-based turbo/LDPC decoder architecture
C Condo, M Martina, G Masera
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE†…, 2012
272012
Simplified Log-MAP algorithm for very low-complexity turbo decoder hardware architectures
M Martina, S Papaharalabos, PT Mathiopoulos, G Masera
IEEE transactions on instrumentation and measurement 63 (3), 531-537, 2013
242013
State metric compression techniques for turbo decoder architectures
M Martina, G Masera
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (5), 1119-1128, 2010
232010
On Practical Implementation and Generalizations of Operator for Turbo and LDPC Decoders
M Martina, G Masera, S Papaharalabos, PT Mathiopoulos, F Gioulekas
IEEE Transactions on Instrumentation and Measurement 61 (4), 888-895, 2011
222011
Low-complexity, efficient 9/7 wavelet filters implementation
M Martina, G Masera
IEEE International Conference on Image Processing 2005 3, III-1000, 2005
182005
FPGA implementation of time–frequency analysis algorithms for laser welding monitoring
A Molino, M Martina, F Vacca, G Masera, A Terreno, G Pasquettaz, ...
Microprocessors and Microsystems 33 (3), 179-190, 2009
172009
A new approach to compress the configuration information of programmable devices
M Martina, G Masera, A Molino, F Vacca, L Sterpone, M Violante
Proceedings of the Design Automation & Test in Europe Conference 2, 4 pp., 2006
17*2006
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Articles 1–20