Wim Dehaene
Wim Dehaene
Verified email at esat.kuleuven.be - Homepage
Cited by
Cited by
Electrical modeling and characterization of through silicon via for three-dimensional ICs
G Katti, M Stucchi, K De Meyer, W Dehaene
IEEE Transactions on Electron Devices 57 (1), 256-262, 2009
Read stability and write-ability analysis of SRAM cells for nanometer technologies
E Grossar, M Stucchi, K Maex, W Dehaene
IEEE Journal of Solid-State Circuits 41 (11), 2577-2588, 2006
Energy efficiency of the IEEE 802.15. 4 standard in dense wireless microsensor networks: Modeling and improvement perspectives
B Bougard, F Catthoor, DC Daly, A Chandrakasan, W Dehaene
Design, Automation, and Test in Europe, 221-234, 2008
Design issues and considerations for low-cost 3-D TSV IC technology
G Van der Plas, P Limaye, I Loi, A Mercha, H Oprins, C Torregiani, S Thijs, ...
IEEE Journal of Solid-State Circuits 46 (1), 293-307, 2010
14.5 envision: A 0.26-to-10tops/w subword-parallel dynamic-voltage-accuracy-frequency-scalable convolutional neural network processor in 28nm fdsoi
B Moons, R Uytterhoeven, W Dehaene, M Verhelst
2017 IEEE International Solid-State Circuits Conference (ISSCC), 246-247, 2017
Organic RFID transponder chip with data rate compatible with electronic product coding
K Myny, S Steudel, S Smout, P Vicca, F Furthner, B van der Putten, ...
Organic Electronics 11 (7), 1176-1179, 2010
An 8-bit, 40-instructions-per-second organic microprocessor on plastic foil
K Myny, E Van Veenendaal, GH Gelinck, J Genoe, W Dehaene, ...
IEEE Journal of Solid-State Circuits 47 (1), 284-291, 2011
3-D technology assessment: Path-finding the technology/design sweet-spot
P Marchal, B Bougard, G Katti, M Stucchi, W Dehaene, A Papanikolaou, ...
Proceedings of the IEEE 97 (1), 96-107, 2009
3D stacked IC demonstration using a through silicon via first approach
J Van Olmen, A Mercha, G Katti, C Huyghebaert, J Van Aelst, E Seppala, ...
2008 IEEE International Electron Devices Meeting, 1-4, 2008
Plastic circuits and tags for 13.56 MHz radio-frequency communication
K Myny, S Steudel, P Vicca, MJ Beenhakkers, NAJM Van Aerle, ...
Solid-State Electronics 53 (12), 1220-1226, 2009
A high-voltage output driver in a 2.5-V 0.25-/spl mu/m CMOS technology
B Serneels, T Piessens, M Steyaert, W Dehaene
IEEE Journal of Solid-State Circuits 40 (3), 576-583, 2005
Methods and apparatus for synchronization of training sequences
Y Vanderperren, W Dehaene
US Patent 7,286,617, 2007
Integrated STEM education: A systematic review of instructional practices in secondary education.
L Thibaut, S Ceuppens, HÊ De Loof, J De Meester, L Goovaerts, A Struyf, ...
European Journal of STEM Education 3 (1), 2, 2018
Technology-Aware Design of SRAM Memory Circuits
W Dehaene
Mar, 2007
From UML/SysML to Matlab/Simulink: current state and future perspectives
Y Vanderperren, W Dehaene
Proceedings of the Design Automation & Test in Europe Conference 1, 1-1, 2006
A 0.02mm2 65nm CMOS 30MHz BW all-digital differential VCO-based ADC with 64dB SNDR
J Daniels, W Dehaene, M Steyaert, A Wiesbauer
2010 Symposium on VLSI Circuits, 155-156, 2010
Unipolar organic transistor circuits made robust by dual-gate technology
K Myny, MJ Beenhakkers, NAJM van Aerle, GH Gelinck, J Genoe, ...
IEEE Journal of Solid-State Circuits 46 (5), 1223-1230, 2011
Through-silicon-via capacitance reduction technique to benefit 3-D IC performance
G Katti, M Stucchi, J Van Olmen, K De Meyer, W Dehaene
IEEE Electron Device Letters 31 (6), 549-551, 2010
A/D conversion using asynchronous delta-sigma modulation and time-to-digital conversion
J Daniels, W Dehaene, MSJ Steyaert, A Wiesbauer
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (9), 2404-2412, 2010
UML for electronic systems design: a comprehensive overview
Y Vanderperren, W Mueller, W Dehaene
Design automation for embedded systems 12 (4), 261-292, 2008
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