Mohamed S. Abdelfattah
Mohamed S. Abdelfattah
Samsung AI Center
Verified email at samsung.com - Homepage
Title
Cited by
Cited by
Year
Gzip on a chip: High performance lossless data compression on fpgas using opencl
MS Abdelfattah, A Hagiescu, D Singh
Proceedings of the international workshop on openCL 2013 & 2014, 1-9, 2014
1072014
Design tradeoffs for hard and soft FPGA-based Networks-on-Chip
MS Abdelfattah, V Betz
International Conference on Field-Programmable Technology (FPT), 95-103, 2012
552012
Field Programmable Gate-Array with Embedded Network-on-Chip Hardware and Design Flow
MS Abdelfattah, VT Betz
US Patent App. 14/060,253, 2015
482015
The Case for Embedded Networks-on-Chip on FPGAs
M Abdelfattah, V Betz
IEEE Micro 34 (1), 1-1, 2014
37*2014
The Power of Communication: Energy-Efficient NoCs for FPGAs
MS Abdelfattah, V Betz
International Conference on Field-Programmable Logic and Applications (FPL), 2013
342013
DLA: Compiler and FPGA overlay for neural network inference acceleration
MS Abdelfattah, D Han, A Bitar, R DiCecco, S O'Connell, N Shanker, ...
2018 28th International Conference on Field Programmable Logic and …, 2018
322018
Take the highway: Design for embedded NoCs on FPGAs
MS Abdelfattah, A Bitar, V Betz
Proceedings of the 2015 ACM/SIGDA International Symposium on Field …, 2015
282015
Networks-on-Chip for FPGAs: Hard, Soft or Mixed?
MS Abdelfattah, V Betz
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (3), 20, 2014
252014
Bringing programmability to the data plane: Packet processing with a NoC-enhanced FPGA
A Bitar, MS Abdelfattah, V Betz
2015 International Conference on Field Programmable Technology (FPT), 24-31, 2015
192015
Design and applications for embedded networks-on-chip on FPGAs
MS Abdelfattah, A Bitar, V Betz
IEEE Transactions on Computers 66 (6), 1008-1021, 2016
162016
Transparent Structural Online Test for Reconfigurable Systems
MS Abdelfattah, L Bauer, C Braun, ME Imhof, MA Kochte, H Zhang, ...
International On-Line Test Symposium (IOLTS), 2012
162012
Power analysis of embedded NoCs on FPGAs and comparison with custom buses
MS Abdelfattah, V Betz
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (1), 165-177, 2015
132015
Brp-nas: Prediction-based nas using gcns
Ł Dudziak, T Chau, MS Abdelfattah, R Lee, H Kim, ND Lane
arXiv preprint arXiv:2007.08668, 2020
102020
Shrinkml: End-to-end asr model compression using reinforcement learning
Ł Dudziak, MS Abdelfattah, R Vipperla, S Laskaridis, ND Lane
arXiv preprint arXiv:1907.03540, 2019
102019
LYNX: CAD for FPGA-based networks-on-chip
MS Abdelfattah, V Betz
2016 26th International Conference on Field Programmable Logic and …, 2016
92016
Best of both worlds: Automl codesign of a cnn and its hardware accelerator
MS Abdelfattah, Ł Dudziak, T Chau, R Lee, H Kim, ND Lane
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
82020
Flexibility: Fpgas and cad in deep learning acceleration
GR Chiu, AC Ling, D Capalija, A Bitar, MS Abdelfattah
Proceedings of the 2018 International Symposium on Physical Design, 34-41, 2018
82018
Journey Towards Tiny Perceptual Super-Resolution
R Lee, Ł Dudziak, M Abdelfattah, SI Venieris, H Kim, H Wen, ND Lane
European Conference on Computer Vision, 85-102, 2020
72020
Design and simulation tools for Embedded NOCs on FPGAs
MS Abdelfattah, A Bitar, A Yaghi, V Betz
2015 25th International Conference on Field Programmable Logic and …, 2015
32015
Evaluation of advanced techniques for structural FPGA self-test
M Abdelfattah
32011
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