| Reuse distance as a metric for cache behavior K Beyls, E D’Hollander Proceedings of the IASTED Conference on Parallel and Distributed Computing …, 2001 | 274 | 2001 |
| Counting integer points in parametric polytopes using Barvinok's rational functions S Verdoolaege, R Seghir, K Beyls, V Loechner, M Bruynooghe Algorithmica 48, 37-66, 2007 | 233 | 2007 |
| Generating cache hints for improved program efficiency K Beyls, EH D’Hollander Journal of Systems Architecture 51 (4), 223-250, 2005 | 123 | 2005 |
| Analytical computation of Ehrhart polynomials: Enabling more compiler analyses and optimizations S Verdoolaege, R Seghir, K Beyls, V Loechner, M Bruynooghe Proceedings of the 2004 international conference on Compilers, architecture …, 2004 | 92 | 2004 |
| Refactoring for data locality K Beyls, EH D'Hollander Computer 42 (2), 62-71, 2009 | 80 | 2009 |
| Discovery of locality-improving refactorings by reuse path analysis K Beyls, EH D’Hollander High Performance Computing and Communications: Second International …, 2006 | 76 | 2006 |
| Reuse distance-based cache hint selection K Beyls, EH D’Hollander Euro-Par 2002 Parallel Processing: 8th International Euro-Par Conference …, 2002 | 76 | 2002 |
| Experiences with enumeration of integer projections of parametric polytopes S Verdoolaege, K Beyls, M Bruynooghe, F Catthoor Compiler Construction: 14th International Conference, CC 2005, Held as Part …, 2005 | 43 | 2005 |
| Software methods to improve data locality and cache behavior K Beyls Ghent University, 2004 | 43 | 2004 |
| Visualizing the impact of the cache on program execution Y Yu, K Beyls, EH D'Hollander Proceedings Fifth International Conference on Information Visualisation, 336-341, 2001 | 43 | 2001 |
| Finding and applying loop transformations for generating optimized FPGA implementations H Devos, K Beyls, M Christiaens, J Van Campenhout, EH D’Hollander, ... Transactions on High-Performance Embedded Architectures and Compilers I, 159-178, 2007 | 39 | 2007 |
| Compile-time cache hint generation for EPIC architectures K Beyls, E D’Hollander 2nd Workshop on Explicitly Parallel Instruction Computing Architecture and …, 2002 | 25 | 2002 |
| Intermediately executed code is the key to find refactorings that improve temporal data locality K Beyls, EH D'Hollander Proceedings of the 3rd conference on Computing Frontiers, 373-382, 2006 | 24 | 2006 |
| Platform-independent cache optimization by pinpointing low-locality reuse K Beyls, EH D’Hollander Computational Science-ICCS 2004: 4th International Conference, Kraków …, 2004 | 22 | 2004 |
| RDVIS: A tool that visualizes the causes of low locality and hints program optimizations K Beyls, EH D’Hollander, F Vandeputte Computational Science–ICCS 2005: 5th International Conference, Atlanta, GA …, 2005 | 16 | 2005 |
| Analytical computation of ehrhart polynomials and its applications for embedded systems S Verdoolaege, K Beyls, M Bruynooghe, R Seghir, V Loechner CW Reports, 12-12, 2004 | 14 | 2004 |
| From loop transformation to hardware generation H Devos, K Beyls, M Christiaens, J Van Campenhout, D Stroobandt Proceedings of the 17th ProRISC Workshop, 249-255, 2006 | 11 | 2006 |
| Visualization enables the programmer to reduce cache misses K Beyls, E D'Hollander, Y Yu 14th IASTED International Conference on Parallel and Distributed Computing …, 2002 | 9 | 2002 |
| Compiler Generated Multithreading to Alleviate Memory Latency. K Beyls, E D'Hollander Journal of Universal Computer Science 6, 968-993, 2000 | 9 | 2000 |
| Reconfigurable optical interconnects for parallel computer systems: design space issues KB Viet, L Desmet, J Dambre, D Stroobandt, K Beyls, ... VCSELs and Optical Interconnects 4942, 236-246, 2003 | 7 | 2003 |
Erik H. D'HollanderProfessor of Computer Science, Ghent UniversityVerified email at elis.ugent.be
