| A 100 MHz 91.5% peak efficiency integrated buck converter with a three-MOSFET cascode bridge F Neveu, B Allard, C Martin, P Bevilacqua, F Voiron IEEE transactions on power electronics 31 (6), 3985-3988, 2015 | 40 | 2015 |
| Giant dielectric constant in TiO2/Al2O3 nanolaminates grown on doped silicon substrate by pulsed laser deposition P Walke, R Bouregba, A Lefevre, G Parat, F Lallemand, F Voiron, ... Journal of Applied Physics 115 (9), 2014 | 28 | 2014 |
| Modeling and multi-objective optimization of 2.5 D inductor-based Fully Integrated Voltage Regulators for microprocessor applications PAM Bezerra, F Krismer, TM Andersen, JW Kolar, A Sridhar, ... 2015 IEEE 13th Brazilian Power Electronics Conference and 1st Southern Power …, 2015 | 20 | 2015 |
| Silicon interposers with integrated passive devices, an excellent alternativ to discrete components F Lallemand, F Voiron 2013 Eurpoean Microelectronics Packaging Conference (EMPC), 1-6, 2013 | 20 | 2013 |
| Assessing the potential of LiPON-based electrical double layer microsupercapacitors for on-chip power storage V Sallaz, S Oukassi, F Voiron, R Salot, D Berardan Journal of Power Sources 451, 227786, 2020 | 19 | 2020 |
| Capacitor 3D-cell and 3D-capacitor structure F Voiron US Patent 9,647,057, 2017 | 17 | 2017 |
| Capacitor formed in insulated pores of an anodized metal layer F Voiron, G Parat US Patent 10,497,582, 2019 | 16 | 2019 |
| New ultra low ESR Mosaïc PICS capacitors for power conversion MM Jatlaoui, L Fourneaud, F Voiron 2015 10th European Microwave Integrated Circuits Conference (EuMIC), 203-206, 2015 | 12 | 2015 |
| Conduction mechanisms in 2D and 3D SIS capacitors S Jacqueline, B Domenges, F Voiron, H Murray Semiconductor science and technology 28 (4), 045018, 2013 | 11 | 2013 |
| Towards cube-sized compute nodes: Advanced packaging concepts enabling extreme 3D integration T Brunschwiler, G Schlottig, A Sridhar, P Bezerra, P Ruch, N Ebejer, ... 2017 IEEE International Electron Devices Meeting (IEDM), 3.7. 1-3.7. 4, 2017 | 10 | 2017 |
| Capacitor structure F Voiron, JR Tenailleau US Patent 9,793,340, 2017 | 10 | 2017 |
| 3D-capacitor structure F Voiron, JR Tenailleau US Patent 10,403,710, 2019 | 8 | 2019 |
| Soft ferrite cores characterization for integrated micro-inductors YM Nguyen, D Bourrier, S Charlot, Z Valdez-Nava, V Bley, C Combettes, ... Journal of Micromechanics and Microengineering 24 (10), 104003, 2014 | 8 | 2014 |
| TSV development, characterization and modeling for 2.5-D interposer applications JR Tenailleau, A Brunet, S Borel, F Voiron, C Bunel 2013 IEEE 63rd Electronic Components and Technology Conference, 1439-1445, 2013 | 8 | 2013 |
| Hybrid All-Solid-State Thin-Film Micro-supercapacitor Based on a Pseudocapacitive Amorphous TiO2 Electrode V Sallaz, S Poulet, J Rouchou, JM Boissel, I Chevalier, F Voiron, Y Lamy, ... ACS Applied Energy Materials 6 (1), 201-210, 2022 | 7 | 2022 |
| Power supply with integrated passives-the EU FP7 powerswipe project CO Mathuna, N Wang, S Kulkarni, R Anthony, N Cordero, J Oliver, P Alou, ... CIPS 2014; 8th International Conference on Integrated Power Electronics …, 2014 | 7 | 2014 |
| Interfacial reactions in multilayers intended for microelectronics devices X Federspiel, F Voiron, M Ignat, T Marieb, H Fujimoto MRS Online Proceedings Library (OPL) 514, 547, 1998 | 7 | 1998 |
| 11.1 A scalable heterogeneous integrated two-stage vertical power-delivery architecture for high-performance computing C Hardy, H Pham, MM Jatlaoui, F Voiron, T Xie, PH Chen, S Jha, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 182-184, 2023 | 6 | 2023 |
| Silicon high-density capacitors for power decoupling applications F Voiron, L Fourneaud 2015 IEEE International Workshop on Integrated Power Packaging (IWIPP), 48-51, 2015 | 6 | 2015 |
| Power Systems-On-Chip: Practical Aspects of Design B Allard John Wiley & Sons, 2016 | 5 | 2016 |
