Bo-Cheng Charles Lai
Bo-Cheng Charles Lai
Verified email at mail.nctu.edu.tw
Title
Cited by
Cited by
Year
Scalable session key construction protocol for wireless sensor networks
B Lai, S Kim, I Verbauwhede
IEEE Workshop on Large Scale RealTime and Embedded Systems (LARTES) 7, 2002
2022002
Leakage power analysis of a 90nm FPGA
T Tuan, B Lai
Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003., 57-60, 2003
2012003
Prototype IC with WDDL and differential routing–DPA resistance assessment
K Tiri, D Hwang, A Hodjat, BC Lai, S Yang, P Schaumont, I Verbauwhede
International Workshop on Cryptographic Hardware and Embedded Systems, 354-365, 2005
1682005
AES-Based Security Coprocessor IC in 0.18-$ muhbox m $ CMOS With Resistance to Differential Power Analysis Side-Channel Attacks
DD Hwang, K Tiri, A Hodjat, BC Lai, S Yang, P Schaumont, ...
IEEE Journal of Solid-State Circuits 41 (4), 781-792, 2006
1502006
A side-channel leakage free coprocessor IC in 0.18 µm CMOS for Embedded AES-based Cryptographic and Biometric Processing
K Tiri, D Hwang, A Hodjat, B Lai, S Yang, P Schaumont, I Verbauwhede
Proceedings of the 42nd annual Design Automation Conference, 222-227, 2005
942005
Advanced RF/baseband interconnect schemes for inter-and intra-ULSI communications
MCF Chang, I Verbauwhede, C Chien, Z Xu, J Kim, J Ko, Q Gu, BC Lai
IEEE Transactions on Electron devices 52 (7), 1271-1285, 2005
902005
Advanced RF/baseband interconnect schemes for inter-and intra-ULSI communications
MCF Chang, I Verbauwhede, C Chien, Z Xu, J Kim, J Ko, Q Gu, BC Lai
IEEE Transactions on Electron devices 52 (7), 1271-1285, 2005
902005
Energy-memory-security tradeoffs in distributed sensor networks
DD Hwang, BCC Lai, I Verbauwhede
International Conference on Ad-Hoc Networks and Wireless, 70-81, 2004
892004
A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-μm CMOS technology
A Hodjat, DD Hwang, B Lai, K Tiri, I Verbauwhede
Proceedings of the 15th ACM Great Lakes symposium on VLSI, 60-63, 2005
762005
Reducing radio energy consumption of key management protocols for wireless sensor networks
BCC Lai, DD Hwang, SP Kim, I Verbauwhede
Proceedings of the 2004 international symposium on Low power electronics and …, 2004
722004
System for biometric signal processing with hardware and software acceleration
I Verbauwhede, P Schaumont, D Hwang, BC Lai, S Yang, K Sakiyama, ...
US Patent App. 10/554,763, 2007
562007
System for biometric signal processing with hardware and software acceleration
I Verbauwhede, P Schaumont, D Hwang, BC Lai, S Yang, K Sakiyama, ...
US Patent App. 10/554,763, 2007
562007
AES-based cryptographic and biometric security coprocessor IC in 0.18-/spl mu/m CMOS resistant to side-channel power analysis attacks
K Tiri, DD Hwang, A Hodjat, BC Lai, S Yang, P Schaumont, ...
Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005., 216-219, 2005
342005
CT-bus: A heterogeneous CDMA/TDMA bus for future SoC
BCC Lai, P Schaumont, I Verbauwhede
Conference Record of the Thirty-Eighth Asilomar Conference on Signals …, 2004
322004
Cooperative multithreading on embedded multiprocessor architectures enables energy-scalable design
P Schaumont, BCC Lai, W Qin, I Verbauwhede
Proceedings. 42nd Design Automation Conference, 2005., 27-30, 2005
282005
Design flow for HW/SW acceleration transparency in the ThumbPod secure embedded system
D Hwang, BC Lai, P Schaumont, K Sakiyama, Y Fan, S Yang, A Hodjat, ...
Proceedings of the 40th annual Design Automation Conference, 60-65, 2003
272003
Efficient designs of multiported memory on FPGA
BCC Lai, JL Lin
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 139-150, 2016
172016
Scalable power management using multilevel reinforcement learning for multiprocessors
GY Pan, JY Jou, BC Lai
ACM Transactions on Design Automation of Electronic Systems (TODAES) 19 (4 …, 2014
122014
A cache hierarchy aware thread mapping methodology for GPGPUs
BCC Lai, HK Kuo, JY Jou
IEEE Transactions on Computers 64 (4), 884-898, 2014
122014
Multi-level parallelism analysis of face detection on a shared memory multi-core system
CH Chiang, CH Kao, GR Li, BCC Lai
Proceedings of 2011 International Symposium on VLSI Design, Automation and …, 2011
122011
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Articles 1–20