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Chun-Ming Hsu
Chun-Ming Hsu
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A low-noise, wide-BW 3.6 GHz digital fractional frequency synthesizer with a noise shaping time-to-digital converter and quantization noise cancellation
CM Hsu
IEEE ISSCC Dig. Tech. Papers, Feb. 2008, 340-341, 2008
441*2008
A low-noise wide-BW 3.6-GHz Digital $ DeltaSigma $ fractional-N frequency synthesizer with a noise-shaping time-to-digital converter and quantization noise cancellation
CM Hsu, MZ Straayer, MH Perrott
Solid-State Circuits, IEEE Journal of 43 (12), 2776-2786, 2008
4352008
New dynamic flip-flops for high-speed dual-modulus prescaler
CY Yang, GK Dehng, JM Hsu, SI Liu
Solid-State Circuits, IEEE Journal of 33 (10), 1568-1571, 1998
1811998
Clock-deskew buffer using a SAR-controlled delay-locked loop
GK Dehng, JM Hsu, CY Yang, SI Liu
Solid-State Circuits, IEEE Journal of 35 (8), 1128-1136, 2000
1512000
A low jitter programmable clock multiplier based on a pulse injection-locked oscillator with a highly-digital tuning loop
BM Helal, CM Hsu, K Johnson, MH Perrott
Solid-State Circuits, IEEE Journal of 44 (5), 1391-1400, 2009
1312009
A low jitter programmable clock multiplier based on a pulse injection-locked oscillator with a highly-digital tuning loop
MH Perrott, K Johnson, CM Hsu, BM Helal
Institute of Electrical and Electronics Engineers, 2009
131*2009
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology
GR Gangasani, CM Hsu, JF Bulzacchelli, S Rylov, T Beukema, D Freitas, ...
Custom Integrated Circuits Conference (CICC), 2011 IEEE, 1-4, 2011
642011
A 32-Gb/s backplane transceiver with on-chip AC-coupling and low latency CDR in 32-nm SOI CMOS technology
GR Gangasani, JF Bulzacchelli, T Beukema, CM Hsu, W Kelly, HH Xu, ...
Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian, 213-216, 2013
442013
Silicon Photonic Microring-Based 4 x 112 Gb/s WDM Transmitter With Photocurrent-Based Thermal Control in 28-nm CMOS
J Sharma, Z Xuan, H Li, T Kim, R Kumar, MN Sakib, CM Hsu, C Ma, ...
IEEE Journal of Solid-State Circuits, 2021
312021
A 900-MHz 1-V CMOS frequency synthesizer
GK Dehng, CY Yang, JM Hsu, SI Liu
Solid-State Circuits, IEEE Journal of 35 (8), 1211-1214, 2000
312000
A 0.18-μm CMOS offset-PLL upconversion modulation loop IC for DCS1800 transmitter
JM Hsu
Solid-State Circuits, IEEE Journal of 38 (4), 603-613, 2003
292003
Multi-band low noise amplifier
JM Hsu, MC Kuo, SF Chen, TH Fu
US Patent 6,882,223, 2005
282005
A 100-Gb/s PAM-4 Optical Receiver With 2-Tap FFE and 2-Tap Direct-Feedback DFE in 28-nm CMOS
H Li, CM Hsu, J Sharma, J Jaussi, G Balamurugan
IEEE Journal of Solid-State Circuits, 2021
262021
Dual-mode receiver and receiving method thereof
CM Hsu, WY Ou, CH Lou, TY Yang
US Patent 7,346,128, 2008
242008
Dynamic quadrature clock correction for a phase rotator system
TJ Beukema, SM Clements, CM Hsu, WR Kelly, EM May, SV Rylov
US Patent 8,139,700, 2012
232012
Techniques for high-performance digital frequency synthesis and phase control
CM Hsu
Massachusetts Institute of Technology, 2008
202008
11.6 A 100Gb/s-8.3 dBm-Sensitivity PAM-4 Optical Receiver with Integrated TIA, FFE and Direct-Feedback DFE in 28nm CMOS
H Li, J Sharma, CM Hsu, G Balamurugan, J Jaussi
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 190-192, 2021
152021
A Scalable 32-56 Gb/s 0.56-1.28 pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28-nm CMOS
M Mansuri, R Inti, J Kennedy, J Qiu, CM Hsu, J Sharma, H Li, B Casper, ...
IEEE Journal of Solid-State Circuits, 2021
122021
Silicon Photonic Micro-Ring Modulator-based 4 x 112 Gb/s O-band WDM Transmitter with Ring Photocurrent-based Thermal Control in 28nm CMOS
J Sharma, H Li, Z Xuan, R Kumar, CM Hsu, M Sakib, P Liao, H Rong, ...
2021 Symposium on VLSI Circuits, 1-2, 2021
112021
A low-noise, wide-BW 3.6 GHz digital fractional-N synthesizer with a noise-shaping time-to digital converter and quantization noise cancellation
CM Hsu, MZ Strayer, MH Perrott
IEEE Journal of Solid-State Circuits 43 (12), 2776-2786, 2008
112008
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