Asmit De
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Towards the hierarchical design of multilayer QCA logic circuit
B Sen, A Nag, A De, BK Sikdar
Journal of Computational Science 11, 233-244, 2015
292015
Security and privacy threats to on-chip Non-Volatile Memories and countermeasures
S Ghosh, MNI Khan, A De, JW Jang
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-6, 2016
202016
Replacing eFlash with STTRAM in IoTs: Security Challenges and Solutions
A De, MNI Khan, J Park, S Ghosh
Journal of Hardware and Systems Security 1 (4), 328-339, 2017
12*2017
Multilayer design of QCA multiplexer
B Sen, A Nag, A De, BK Sikdar
2013 Annual IEEE India Conference (INDICON), 1-6, 2013
112013
Preventing Reverse Engineering using threshold voltage defined multi-input camouflaged gates
A De, S Ghosh
2017 IEEE International Symposium on Technologies for Homeland Security (HST …, 2017
102017
HarTBleed: Using Hardware Trojans for Data Leakage Exploits
A De, MNI Khan, K Nagarajan, S Ghosh
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (4), 968-979, 2020
72020
FIXER: Flow Integrity Extensions for Embedded RISC-V
A De, A Basu, S Ghosh, T Jaeger
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 348-353, 2019
72019
Cache-Out: Leaking Cache Memory Using Hardware Trojan
MNI Khan, A De, S Ghosh
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (6 …, 2020
52020
Cache Bypassing and Checkpointing to Circumvent Data Security Attacks on STTRAM
N Rathi, A De, H Naeimi, S Ghosh
arXiv preprint arXiv:1603.06227, 2016
52016
Threshold-defined logic and interconnect for protection against reverse engineering
JW Jang, A De, D Vontela, I Nirmala, S Ghosh, A Iyengar
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
32018
CTCG: Charge-trap based camouflaged gates for reverse engineering prevention
A De, A Iyengar, MNI Khan, SH Lin, S Thirumala, S Ghosh, S Gupta
2018 IEEE International Symposium on Hardware Oriented Security and Trust …, 2018
32018
Power side channel attack analysis and detection
N Gattu, MNI Khan, A De, S Ghosh
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-7, 2020
22020
Hardware Assisted Buffer Protection Mechanisms for Embedded RISC-V
A De, A Basu, S Ghosh, T Jaeger
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
12020
TrappeD: DRAM Trojan Designs for Information Leakage and Fault Injection Attacks
K Nagarajan, A De, MNI Khan, S Ghosh
arXiv preprint arXiv:2001.00856, 2020
12020
Hands-On Cybersecurity Curriculum using a Modular Training Kit
A De
12020
TrappeD: DRAM trojan designs for information leakage and fault injection attacks
AD Karthikeyan Nagarajan
Microprocessor test and validation, 2019
12019
Threshold voltage defined multi-input complex gates
A De, S Ghosh
2017 IEEE International Symposium on Hardware Oriented Security and Trust …, 2017
12017
Recent Advances in Emerging Technology-based Security Primitives, Attacks and Mitigation
K Nagarajan, A De, SS Ensan, A Ash-Saki, MNI Khan, S Ghosh
2020 IEEE 63rd International Midwest Symposium on Circuits and Systems …, 2020
2020
RF-Trojan: Leaking Kernel Data Using Register File Trojan
MNI Khan, A De, S Ghosh
arXiv preprint arXiv:1904.07144, 2019
2019
Armor PLC: A Platform for Cyber Security Threats Assessments for PLCs
W Zhang, Y Jiao, D Wu, S Srinivasa, A De, S Ghosh, P Liu
Procedia Manufacturing 39, 270-278, 2019
2019
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Artikelen 1–20