Reducing power consumption in the early stages of a pipeline sub-ADC used in a time-interleaved ADC J Joy, A Seedher, A Shrivastava US Patent 7,551,114, 2009 | 24 | 2009 |
A fully integrated power-management solution for a 65nm CMOS cellular handset chip AJ D'Souza, R Singh, JR Prabhu, G Chowdary, A Seedher, S Somayajula, ... 2011 IEEE International Solid-State Circuits Conference, 382-384, 2011 | 19 | 2011 |
Power management unit systems and methods S Vasadi, A Seedher, S Somayajula US Patent 9,172,303, 2015 | 13 | 2015 |
Precise and process-invariant bandgap reference circuit and method PCA Tadeparthy, A Seedher US Patent 7,230,473, 2007 | 13 | 2007 |
Hitless switching when generating an output clock derived from multiple redundant input clocks A Seedher, A Marques, S Sridharan, K Thakur US Patent 10,514,720, 2019 | 10 | 2019 |
Reducing power consumption in an amplification stage driving a sample and hold circuit while maintaining linearity S Mathur, A Seedher, PCA Tadeparthy US Patent 7,724,042, 2010 | 10 | 2010 |
Fractional rate phase detectors for clock and data recovery A Seedher, GE Sobelman IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings., 313-316, 2003 | 10 | 2003 |
Phase locked loop with low phase-noise A Seedher, S Vasadi, A Marques, S Sridharan US Patent App. 15/051,675, 2016 | 7 | 2016 |
On the spectral tones in a digital-analog converter due to mismatch and flicker noise G Chandra, A Seedher IEEE Transactions on Circuits and Systems II: Express Briefs 55 (7), 619-623, 2008 | 6 | 2008 |
Wideband switched current source A Seedher, PCA Tadeparthy, JG Joy US Patent 7,777,655, 2010 | 5 | 2010 |
Pop-up noise reduction in a device A Seedher, RJ Prabhu, SS Somayajula US Patent 9,025,791, 2015 | 4 | 2015 |
Circuit for controlling current to light-emitting diode (LED) S Somayajula, N Nalam, AJ Dsouza, A Seedher US Patent 8,912,798, 2014 | 3 | 2014 |
Pulse width modulation for switching amplifier SS Somayajula, A Seedher, RJ Prabhu US Patent 8,841,950, 2014 | 2 | 2014 |
40 nm cmos white led driver for mobile display application A Dsouza, A Seedher, S Somayajula, C Martelli, R Pantaleoni, F Neri 2012 IEEE International Conference on Electronics Design, Systems and …, 2012 | 2 | 2012 |
Automated design of a 10-bit, 80MSPS WLAN DAC for linearity and low-area A Seedher, P Tadeparthy, KAS Satheesh, VT Anuroop 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 5545-5548, 2005 | 2 | 2005 |
Obtaining lock in a phase-locked loop (PLL) upon being out of phase-lock RK Gupta, N Naidu, S Sridharan, A Seedher, S Agrawal US Patent 11,588,489, 2023 | 1 | 2023 |
Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailable A Seedher, S Sridharan, RK Gupta, N Naidu, S Agrawal, G Jeevabharathi, ... US Patent 12,149,255, 2024 | | 2024 |
Preventing reverse-current flow when an integrated circuit operates using power supplies of different magnitudes RK Gupta, S Mitra, A Pulincherry, A Seedher US Patent 12,026,028, 2024 | | 2024 |
Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailable A Seedher, S Sridharan, RK Gupta, N Naidu, S Agrawal, G Jeevabharathi, ... US Patent 11,967,965, 2024 | | 2024 |
Fast switching of output frequency of a phase locked loop (PLL) S Sridharan, A Seedher, P Choudhary, S Sasi, A Gupta, G Jeevabharathi US Patent 11,923,864, 2024 | | 2024 |