| Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar L Chen, J Li, Y Chen, Q Deng, J Shen, X Liang, L Jiang Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 19-24, 2017 | 202 | 2017 |
| Test architecture design and optimization for three-dimensional SoCs L Jiang, L Huang, Q Xu 2009 Design, Automation & Test in Europe Conference & Exhibition, 220-225, 2009 | 121 | 2009 |
| On effective TSV repair for 3D-stacked ICs L Jiang, Q Xu, B Eklow 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 793-798, 2012 | 117 | 2012 |
| Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint L Jiang, Q Xu, K Chakrabarty, TM Mak Proceedings of the 2009 International Conference on Computer-Aided Design …, 2009 | 92 | 2009 |
| Yield enhancement for 3D-stacked memory by redundancy sharing across dies L Jiang, R Ye, Q Xu 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 230-234, 2010 | 82 | 2010 |
| On effective through-silicon via repair for 3-D-stacked ICs L Jiang, Q Xu, B Eklow IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 76 | 2013 |
| ReCom: An efficient resistive accelerator for compressed deep neural networks H Ji, L Song, L Jiang, H Li, Y Chen 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 237-240, 2018 | 63 | 2018 |
| Drq: dynamic region-based quantization for deep neural network acceleration Z Song, B Fu, F Wu, Z Jiang, L Jiang, N Jing, X Liang 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 59 | 2020 |
| On effective and efficient in-field TSV repair for stacked 3D ICs L Jiang, F Ye, Q Xu, K Chakrabarty, B Eklow Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013 | 46 | 2013 |
| An ultra-efficient memristor-based dnn framework with structured weight pruning and quantization using admm G Yuan, X Ma, C Ding, S Lin, T Zhang, ZS Jalali, Y Zhao, L Jiang, ... 2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019 | 45 | 2019 |
| System-level hardware failure prediction using deep learning X Sun, K Chakrabarty, R Huang, Y Chen, B Zhao, H Cao, Y Han, X Liang, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 44 | 2019 |
| Yield enhancement for 3D-stacked ICs: Recent advances and challenges Q Xu, L Jiang, H Li, B Eklow 17th Asia and South Pacific Design Automation Conference, 731-737, 2012 | 41 | 2012 |
| Modeling TSV open defects in 3D-stacked DRAM L Jiang, Y Liu, L Duan, Y Xie, Q Xu 2010 IEEE International Test Conference, 1-9, 2010 | 39 | 2010 |
| PIM-prune: Fine-grain DCNN pruning for crossbar-based process-in-memory architecture C Chu, Y Wang, Y Zhao, X Ma, S Ye, Y Hong, X Liang, Y Han, L Jiang 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 27 | 2020 |
| Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs N Jing, J Wang, F Fan, W Yu, L Jiang, C Li, X Liang 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 25 | 2016 |
| Energy-efficient eDRAM-based on-chip storage architecture for GPGPUs N Jing, L Jiang, T Zhang, C Li, F Fan, X Liang IEEE Transactions on Computers 65 (1), 122-135, 2015 | 25 | 2015 |
| On quality trade-off control for approximate computing using iterative training C Xu, X Wu, W Yin, Q Xu, N Jing, X Liang, L Jiang Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 24 | 2017 |
| Integrated test-architecture optimization and thermal-aware test scheduling for 3-D SoCs under pre-bond test-pin-count constraint L Jiang, Q Xu, K Chakrabarty, TM Mak IEEE transactions on very large scale integration (VLSI) systems 20 (9 …, 2011 | 23 | 2011 |
| Improving neural network efficiency via post-training quantization with adaptive floating-point F Liu, W Zhao, Z He, Y Wang, Z Wang, C Dai, X Liang, L Jiang Proceedings of the IEEE/CVF International Conference on Computer Vision …, 2021 | 19 | 2021 |
| AXNet: ApproXimate computing using an end-to-end trainable neural network Z Peng, X Chen, C Xu, N Jing, X Liang, C Lu, L Jiang Proceedings of the International Conference on Computer-Aided Design, 1-8, 2018 | 18 | 2018 |
Xiaoyao LiangShanghai Jiao Tong UniversityGeverifieerd e-mailadres voor eecs.harvard.edu
