| Design and optimization of double-RESURF high-voltage lateral devices for a manufacturable process M Imam, Z Hossain, M Quddus, J Adams, C Hoggatt, T Ishiguro, R Nair IEEE Transactions on Electron Devices 50 (7), 1697-1700, 2003 | 107 | 2003 |
| Efficacy of charge sharing in reshaping the surface electric field in high-voltage lateral RESURF devices M Imam, M Quddus, J Adams, Z Hossain IEEE Transactions on Electron Devices 51 (1), 141-148, 2004 | 95 | 2004 |
| Double-RESURF 700 V n-channel LDMOS with best-in-class on-resistance Z Hossain, M Imam, J Fulton, M Tanaka Proceedings of the 14th International Symposium on Power Semiconductor …, 2002 | 71 | 2002 |
| Semiconductor device with enhanced mobility and method GM Grivna, Z Hossain, KK Huang, B Padmanabhan, FY Robb, ... US Patent 8,466,513, 2013 | 57 | 2013 |
| High voltage lateral FET structure with improved on resistance performance RS Nair, SL Tu, Z Hossain, MT Quddus US Patent 7,126,166, 2006 | 45 | 2006 |
| High voltage metal oxide device with enhanced well region Z Hossain, EN Stefanov, MT Quddus, J Fulton, M Imam US Patent 6,448,625, 2002 | 43 | 2002 |
| Field-plate effects on the breakdown voltage of an integrated high-voltage LDMOS transistor Hossain, Ishigwo, Corleto, Kuramae, Nair 2004 Proceedings of the 16th International Symposium on Power Semiconductor …, 2004 | 38 | 2004 |
| Electronic device including a trench and a conductive structure therein and a process of forming the same Z Hossain, GM Grivna US Patent 9,070,585, 2015 | 34 | 2015 |
| Semiconductor device having trench edge termination structure Z Hossain US Patent 7,948,033, 2011 | 34 | 2011 |
| Process & design impact on BVDSS stability of a shielded gate trench power MOSFET Z Hossain, B Burra, J Sellers, B Pratt, P Venkatraman, G Loechelt, A Salih 2014 IEEE 26th International Symposium on Power Semiconductor Devices & IC's …, 2014 | 29 | 2014 |
| Method of forming a super-junction semiconductor device Z Hossain, P Venkatraman US Patent 6,982,193, 2006 | 28 | 2006 |
| Semiconductor component and method of manufacture P Venkatraman, Z Hossain US Patent 8,415,739, 2013 | 27 | 2013 |
| Method for manufacturing a high voltage MOSFET semiconductor device with enhanced charge controllability M Imam, J Fulton, Z Hossain, M Tanaka, T Yamamoto, Y Enosawa, ... US Patent 6,773,997, 2004 | 26 | 2004 |
| Method of making an insulated gate semiconductor device having a shield electrode structure Z Hossain, GM Grivna, DB Barber, P McGrath, B Padmanabhan, ... US Patent 9,029,215, 2015 | 24 | 2015 |
| Determination of manufacturing RESURF process window for a robust 700V double RESURF LDMOS transistor Z Hossain 2008 20th International Symposium on Power Semiconductor Devices and IC's …, 2008 | 24 | 2008 |
| Method of forming a semiconductor device termination and structure therefor JR Guitart, P Moens, Z Hossain US Patent 9,490,372, 2016 | 23 | 2016 |
| LDMOS transistor with enhanced termination region for high breakdown voltage with on-resistance Z Hossain, M Imam, J Fulton US Patent 7,208,385, 2007 | 23 | 2007 |
| Heterojunction semiconductor device having integrated clamping device B Padmanabhan, P Venkatraman, Z Hossain, CL Liu, J McDONALD, ... US Patent 9,748,224, 2017 | 20 | 2017 |
| LDMOS transistor with enhanced termination region for high breakdown voltage with low on-resistance Z Hossain, M Imam, J Fulton US Patent 6,919,598, 2005 | 20 | 2005 |
| Chitin from the shell of two coastal portunid crabs of Bangladesh NG Das, PA Khan, Z Hossain Indian Journal of Fisheries 43 (4), 413-415, 1996 | 20 | 1996 |
